Skip to content
Commit f90668c8 authored by sstwcw's avatar sstwcw
Browse files

[clang-format] Handle Verilog assign statements

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D146402
parent 0e01c3d2
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment