Summary:
Add links to ISA manuals and ABI.
Add text about assembler syntax.
Add info about instructions operands.
Add instruction examples for each encoding.
Update directives section, add missing .amdgpu_hsa_kernel.

Reviewers: tstellarAMD, SamWot, vpykhtin

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, artem.tamazov, llvm-commits

Differential Revision: https://reviews.llvm.org/D24724

llvm-svn: 281962

This code block breaks the docs build (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11920/steps/docs-llvm-html/logs/stdio), but I cannot see anything immediately wrong with it and cannot reproduce the diagnostic locally. Setting the code highlighting to none instead of nasm to hopefully get the bot stumbling back towards green.

llvm-svn: 275998

Speculatively fix the sphinx build, which does not think the original code was valid nasm (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11854/steps/docs-llvm-html/logs/stdio).

llvm-svn: 275408

Summary:
Address space mapping is described in lib/Target/AMDGPU/AMDGPU.h in
Doxygen comments. This patch adds the description to user guide for
AMDGPU back-end.

Patch By: Vedran Miletić

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17046

llvm-svn: 265500

llvm-svn: 261628

Reviewers: arsenm, nhaustov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17461

llvm-svn: 261550

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10772

llvm-svn: 240839

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10757

llvm-svn: 240831

llvm-svn: 239657

- Add glc, slc, and tfe operands to flat instructions
- Add missing flat instructions
- Fix the encoding of flat_load_dwordx3 and flat_store_dwordx3.

llvm-svn: 239637

This is currently considered experimental, but most of the more
commonly used instructions should work.

So far only SI has been extensively tested, CI and VI probably work too,
but may be buggy.  The current set of tests cases do not give complete
coverage, but I think it is sufficient for an experimental assembler.

See the documentation in R600Usage for more information.

llvm-svn: 234381

This was done using the Sparc and PowerPC AsmParsers as guides.  So far it
is very simple and only supports sopp instructions.

llvm-svn: 221994