llvm-svn: 186131

llvm-svn: 186123

llvm-svn: 186121

(reduced LLVM IR) + (full source in comment)
with the
(full LLVM IR) + (reduced src in comment)

llvm-svn: 186119

llvm-svn: 186118

llvm-svn: 186116

llvm-svn: 186113

llvm-svn: 186110

We had patterns to match v4i32 immAllZerosV -> V_SET0, but not patterns for
v8i16 (which occurs in the test case) or v16i8. The same was true for
V_SETALLONES (so I added the associated patterns for those as well).

Another bug found by llvm-stress.

llvm-svn: 186108

Patch by Michele Scandale!

Adds a special handling of the case where, during the loop exit
condition rewriting, the exit value is a constant of bitwidth lower
than the type of the induction variable: instead of introducing a
trunc operation in order to match correctly the operand types, it
allows to convert the constant value to an equivalent constant,
depending on the initial value of the induction variable and the trip
count, in order have an equivalent comparison between the induction
variable and the new constant.

llvm-svn: 186107

This fixes a bug (found by csmith) at -O0 where we attempt to create a RLWIMI
with an out-of-range operand. Most uses of the isRunOfOnes function are guarded
by a condition that the value is not zero. This was not true in two places, and
in both places a zero input would result in an out-of-rage MB value (= 32).

To fix this, isRunOfOnes returns false on a zero input (and I've remove one
now-redundant guard).

llvm-svn: 186101

llvm-svn: 186098

llvm-svn: 186096

No functionality change.

llvm-svn: 186095

llvm-svn: 186094

llvm-svn: 186092

Arithmetic on ConstantRanges creates a lot of large temporary APInts that
benefit from move semantics.

llvm-svn: 186091

While at it, use strftime on Unix too and use the thread safe versions
of localtime.

llvm-svn: 186090

We can vectorize them because in the case where we wrap in the address space the
unvectorized code would have had to access a pointer value of zero which is
undefined behavior in address space zero according to the LLVM IR semantics.
(Thank you Duncan, for pointing this out to me).

Fixes PR16592.

llvm-svn: 186088

llvm-svn: 186084

in parallel.

llvm-svn: 186083

llvm-svn: 186082

llvm-svn: 186081

* It is not present on OS X.
* It is untested.
* It is not needed for using ar in a build system.

llvm-svn: 186080

llvm-svn: 186079

* All systems we support have some form of long name support.
* The options has different names and semantics in different implementations
  ('f' on gnu, 'T' on OS X), which makes it unlikely it is normally used on
  build systems.
* It was completely untested.

llvm-svn: 186078

llvm-svn: 186076

- Coallocate entires for AttributeSetImpls and Nodes after the class itself.
- Remove mutable iterators from immutable classes.
- Remove unused context field from AttributeImpl.
- Derive Enum/Align/String attribute implementations from AttributeImpl instead
  of having a whole new inheritance tree for them.
- Derive AlignAttributeImpl from EnumAttributeImpl.

llvm-svn: 186075

llvm-svn: 186074

Extend r186072 to handle shifts and ANDs.

llvm-svn: 186073

RISBG can handle some ANDs for which no AND IMMEDIATE exists.
It also acts as a three-operand AND for some cases where an
AND IMMEDIATE could be used instead.

It might be worth adding a pass to replace RISBG with AND IMMEDIATE
in cases where the register operands end up being the same and where
AND IMMEDIATE is smaller.

llvm-svn: 186072

RISBG has three 8-bit operands (I3, I4 and I5).  I'd originally
restricted all three to 6 bits, since that's the only range we intended
to use at the time.  However, the top bit of I4 acts as a "zero" flag for
RISBG, while the top bit of I3 acts as a "test" flag for RNSBG & co.
This patch therefore allows them to have the full 8-bit range.
I've left the fifth operand as a 6-bit value for now since the
upper 2 bits have no defined meaning.

llvm-svn: 186070

predecessors of the two blocks it is attempting to merge supply the
same incoming values to any phi in the successor block.  This change
allows merging in the case where there is one or more incoming values
that are undef.  The undef values are rewritten to match the non-undef
value that flows from the other edge.  Patch by Mark Lacey.

llvm-svn: 186069

MF is normally initialized in AsmPrinter::SetupMachineFunction, but if the file
contains only globals (no functions), then we need this to be initialized
because, when encountering an error, lowerConstant() references it.

This should fix the non-deterministic failures of
test/CodeGen/X86/nonconst-static-iv.ll, etc.

llvm-svn: 186068

When computing currently-live registers, the register scavenger excludes undef
uses. As a result, undef uses are ignored when computing the restore points of
registers spilled into the emergency slots. While the register scavenger
normally excludes from consideration, when scavenging, registers used by the
current instruction, we need to not exclude undef uses. Otherwise, we might end
up requiring more emergency spill slots than we have (in the case where the
undef use *is* the currently-spilled register).

Another bug found by llvm-stress.

llvm-svn: 186067

llvm-svn: 186065

llvm-svn: 186064

llvm-svn: 186063

llvm-svn: 186062

llvm-svn: 186060