llvm-svn: 140003

llvm-svn: 140001

llvm-svn: 140000

Note that this example doesn't work anymore!

llvm-svn: 139999

llvm-svn: 139998

dag-combine optimization to implement the ext-load efficiently (using shuffles).

For example the type <4 x i8> is stored in memory as i32, but it needs to
find its way into a <4 x i32> register. Previously we scalarized the memory
access, now we use shuffles.

llvm-svn: 139995

llvm-svn: 139994

llvm-svn: 139993

llvm-svn: 139992

maxps and maxpd).  This broke the sse41-blend.ll testcase by causing
maxpd to be produced rather than a cmp+blend pair, which is the reason
I tweaked it.  Gives a small speedup on doduc with dragonegg when the
GCC vectorizer is used.

llvm-svn: 139986

mayLoad = 1

llvm-svn: 139973

llvm-svn: 139972

llvm-svn: 139970

llvm-svn: 139969

Add ImmutableMapRef and ImmutableSetRef, which consolidate Immutable[Map,Set] and its Factory.  This may eventually replace Immtuable[Map,Set].

llvm-svn: 139967

llvm-svn: 139966

llvm-svn: 139965

llvm-svn: 139964

llvm-svn: 139963

llvm-svn: 139962

llvm-svn: 139961

llvm-svn: 139960

llvm-svn: 139959

llvm-svn: 139958

llvm-svn: 139957

llvm-svn: 139956

llvm-svn: 139955

llvm-svn: 139954

are declared with load patterns. This fix the crash in PR10941. No testcases,
since a fold is triggered and then converted back to the register form
afterwards.

llvm-svn: 139953

llvm-svn: 139952

llvm-svn: 139951

llvm-svn: 139950

More addressing mode encoding bits. Handle pre increment for STR/STRB/STRH
and STR(register).

llvm-svn: 139949

expression matching.

llvm-svn: 139945

llvm-svn: 139944

llvm-svn: 139943

Add aliases for STRB/STRH while there. Tests forthcoming for those.

llvm-svn: 139942

llvm-svn: 139940

This PR basically reports a problem where a crash in generated code
happened due to %rbp being clobbered:

  pushq %rbp
  movq  %rsp, %rbp
  ....
  vmovmskps %ymm12, %ebp
  ....
  movq  %rbp, %rsp
  popq  %rbp
  ret

Since Eric's r123367 commit, the default stack alignment for x86 32-bit
has changed to be 16-bytes. Since then, the MaxStackAlignmentHeuristicPass
hasn't been really used, but with AVX it becomes useful again, since per
ABI compliance we don't always align the stack to 256-bit, but only when
there are 256-bit incoming arguments.

ReserveFP was only used by this pass, but there's no RA target hook that
uses getReserveFP() to check for the presence of FP (since nothing was
triggering the pass to run, the uses of getReserveFP() were removed
through time without being noticed). Change this pass to use
setForceFramePointer, which is properly called by MachineFunction
hasFP method.

The testcase is very big and dependent on RA, not sure if it's worth
adding to test/CodeGen/X86.

llvm-svn: 139939

llvm-svn: 139938