llvm-svn: 90653

integers that are constant except for a single bit (the same n-th bit in each).

llvm-svn: 90646

Don't print "SrcLine"; just print the filename and line number, which
is obvious enough and more informative.

llvm-svn: 90631

llvm-svn: 90626

llvm-svn: 90623

llvm-svn: 90619

folding a load from constant.

llvm-svn: 90545

that I'm working on.  This is manifesting as a miscompile of 255.vortex
on some targets.  No check lines yet because it fails.

llvm-svn: 90520

The coalescer is supposed to clean these up, but when setting up parameters
for a function call, there may be copies to physregs. If the defining
instruction has been LICM'ed far away, the coalescer won't touch it.

The register allocation hint does not always work - when the register
allocator is backtracking, it clears the hints.

This patch takes care of a few more cases that r90163 missed.

llvm-svn: 90502

Don't pull vector sext through both hands of a logical operation, since doing so prevents the fusion of vector sext and setcc into vsetcc.
Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.

llvm-svn: 90423

both source operands.  In the canonical form, the 2nd operand is changed to an
undef and the shuffle mask is adjusted to only reference elements from the 1st
operand.  Radar 7434842.

llvm-svn: 90417

llvm-svn: 90408

llvm-svn: 90380

llvm-svn: 90369

llvm-svn: 90352

per Chris' comments.  Adjust testcases to match.

llvm-svn: 90304

llvm-svn: 90293

llvm-svn: 90292

llvm-svn: 90291

llvm-svn: 90290

- A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber.
- If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range.
- Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature".

llvm-svn: 90269

llvm-svn: 90260

Clear function specific containers while processing end of a function, even if DW_TAG_subprogram for current function is not found.

llvm-svn: 90247

llvm-svn: 90216

llvm-svn: 90212

precisely, which prevents us from infinitely peeling the loop.

llvm-svn: 90211

This means that well connected blocks are copy coalesced before the less connected blocks. Connected blocks are more difficult to
coalesce because intervals are more complicated, so handling them first gives a greater chance of success.

llvm-svn: 90194

llvm-svn: 90185

llvm-svn: 90180

llvm-svn: 90176

New virtual registers created for spill intervals should inherit allocation hints from the original register.

This helps us avoid silly copies when rematting values that are copied to a physical register:

leaq	_.str44(%rip), %rcx
movq	%rcx, %rsi
call	_strcmp

becomes:

leaq	_.str44(%rip), %rsi
call	_strcmp

The coalescer will not touch the movq because that would tie down the physical register.

llvm-svn: 90163

llvm-svn: 90160

llvm-svn: 90112

llvm-svn: 90109

while 32-bit gcc uses i32.

llvm-svn: 90106

more. Update the syntax we're checking for and filecheckize it too.

This will fix the selfhost buildbots but will 'break' the others (sigh) because
they're still linked against older LLVM which is emitting less optimized IR.

llvm-svn: 90104

This permits the devirtualization of llvm.org/PR3100#c9 when compiled by clang.

llvm-svn: 90099

fix bugs exposed by the tests.  Testcases from Alastair Lynn!

llvm-svn: 90056

llvm-svn: 90049

void test(int N, double* G) {
  long j;
  for (j = 1; j < N - 1; j++)
      G[j] = G[j] + G[j+1] + G[j-1];
}

which we now compile to one load in the loop:

LBB1_2:                                                     ## %bb
	movsd	16(%rsi,%rax,8), %xmm2
	incq	%rdx
	addsd	%xmm2, %xmm1
	addsd	%xmm1, %xmm0
	movapd	%xmm2, %xmm1
	movsd	%xmm0, 8(%rsi,%rax,8)
	incq	%rax
	cmpq	%rcx, %rax
	jne	LBB1_2

instead of:

LBB1_2:                                                     ## %bb
	movsd	8(%rsi,%rax,8), %xmm0
	addsd	16(%rsi,%rax,8), %xmm0
	addsd	(%rsi,%rax,8), %xmm0
	movsd	%xmm0, 8(%rsi,%rax,8)
	incq	%rax
	cmpq	%rcx, %rax
	jne	LBB1_2

llvm-svn: 90048