issues.

llvm-svn: 177136

llvm-svn: 177135

therefore references to members should not be transformed into implicit uses of
'this'. Patch by Ismail Pazarbasi!

llvm-svn: 177134

llvm-svn: 177133

Patch by Manuel Klimek!

llvm-svn: 177132

llvm-svn: 177131

llvm-svn: 177130

(these were added in r177089)

llvm-svn: 177129

llvm-svn: 177128

on first declaration only. // rdar://13364028

llvm-svn: 177127

This created 2 issues:

1) Performance issue, since typo-correction with PCH/modules is rather expensive.
2) Correctness issue, since if it managed to "correct" 'super' then bogus compiler errors would
be emitted, like this:

3.m:8:3: error: unknown type name 'super'; did you mean 'super1'?
  super.x = 0;
  ^~~~~
  super1
t3.m:5:13: note: 'super1' declared here
typedef int super1;
            ^
t3.m:8:8: error: expected identifier or '('
  super.x = 0;
       ^

llvm-svn: 177126

lldb remembers not-found source file, setting target.source-map doesn't make it re-check for it. Now this is fixed. Each time the source path remappings get updated, the modification ID in the PathMappingList gets bumped and then we know the re-check for sources.

llvm-svn: 177125

llvm-svn: 177124

This is the other half of r177122 that I meant to commit at the same time.

llvm-svn: 177123

The new InstrSchedModel is easier to use than the instruction
itineraries. It will be used to model instruction latency and throughput
in modern Intel microarchitectures like Sandy Bridge.

InstrSchedModel should be able to coexist with instruction itinerary
classes, but for cleanliness we should switch the Atom processor model
to the new InstrSchedModel as well.

llvm-svn: 177122

[analyzer] Change the way in which IDC Visitor decides to kick in and make sure it attaches in the given edge case

In the test case below, the value V is not constrained to 0 in ErrorNode but it is in node N.
So we used to fail to register the Suppression visitor.

We also need to change the way we determine that the Visitor should kick in because the node N belongs to
the ExplodedGraph and might not be on the BugReporter path that the visitor sees. Instead of trying to match the node,
turn on the visitor when we see the last node in which the symbol is ‘0’.

llvm-svn: 177121

See the Mips16ISetLowering.cpp patch to see a use of this.
For now now the extra code in Mips16ISetLowering.cpp is a nop but is
used for test purposes. Mips32 registers are setup and then removed and
then the Mips16 registers are setup. 

Normally you need to add register classes and then call
computeRegisterProperties.

llvm-svn: 177120

llvm-svn: 177119

Un-breaks gdb's invoke-block behavior.

llvm-svn: 177118

Add some logging to track cases where “step-in” steps out due to the avoid-regexp and the step-in target.

llvm-svn: 177117

 -Adds workaround for assertion in lldb for TestEvents.py

llvm-svn: 177116

Also remove some unneeded function attributes.

llvm-svn: 177114

the win64 calling convention.
rdar://13423768

llvm-svn: 177113

This allows abitrary groups of processor resources. Using something in
a subset automatically counts againts the superset. Currently, this
only works if the superset is also a ProcResGroup as opposed to a
SuperUnit.

This allows SandyBridge to be expressed naturally, which will be
checked in shortly.

def SBPort01 : ProcResGroup<[SBPort0, SBPort1]>;
def SBPort15 : ProcResGroup<[SBPort1, SBPort5]>;
def SBPort23  : ProcResGroup<[SBPort2, SBPort3]>;
def SBPort015 : ProcResGroup<[SBPort0, SBPort1, SBPort5]>;

llvm-svn: 177112

This is a generic function (derived from PEI); moving it into
MachineFrameInfo eliminates a current redundancy between the ARM and AArch64
backends, and will allow it to be used by the PowerPC target code.

No functionality change intended.

llvm-svn: 177111

[PR15513/<rdar://problem/13409707>] Template arguments in diagnostics aren't always known at compile time.

llvm-svn: 177110

llvm-svn: 177109

Add the current PEI register scavenger as a parameter to the
processFunctionBeforeFrameFinalized callback.

This change is necessary in order to allow the PowerPC target code to
set the register scavenger frame index after the save-area offset
adjustments performed by processFunctionBeforeFrameFinalized. Only
after these adjustments have been made is it possible to estimate
the size of the stack frame.

llvm-svn: 177108

Make requiresFrameIndexScavenging return true, and create virtual registers in
the spilling code instead of using the register scavenger directly. This makes
the target-level code simpler, and importantly, delays the scavenging until
after callee-saved register processing (which will be important for later
changes).

Also cleans up trackLivenessAfterRegAlloc (makes it inline in the header with
the other related functions). This makes it clear that it always returns true.

No functionality change intended.

llvm-svn: 177107

We used to add a spill slot for the register scavenger whenever the function
has a frame pointer. This is unnecessarily conservative: We may need the spill
slot for dynamic stack allocations, and functions with dynamic stack
allocations always have a FP, but we might also have a FP for other reasons
(such as the user explicitly disabling frame-pointer elimination), and we don't
necessarily need a spill slot for those functions.

The structsinregs test needed adjustment because it disables FP elimination.

llvm-svn: 177106

By terrible I mean we store/load from the stack.

This matters on PAQp8 in _Z5trainPsS_ii (which is inlined into Mixer::update)
where we decide to vectorize a loop with a VF of 8 resulting in a 25%
degradation on a cortex-a8.

LV: Found an estimated cost of 2 for VF 8 For instruction:   icmp slt i32
LV: Found an estimated cost of 2 for VF 8 For instruction:   select i1, i32, i32

The bug that tracks the CodeGen part is PR14868.

radar://13403975

llvm-svn: 177105

No functionality changes.

llvm-svn: 177104

We are warning the user about the alignment, so we should not assert.

llvm-svn: 177103

llvm-svn: 177102

Patch by Stephen Hines.

llvm-svn: 177101

A test case for the performance of some LLDB formatters
Changes and improvements to the testing infrastructure itself

llvm-svn: 177100

llvm-svn: 177099

We generate a select with a vectorized condition argument when the condition is
NOT loop invariant. Not the other way around.

llvm-svn: 177098

llvm-svn: 177096

No intended functionality changes.

llvm-svn: 177095