llvm-svn: 165568

llvm-svn: 165566

llvm-svn: 165565

misched: Allow flags to disable hasInstrSchedModel/hasInstrItineraries for external users of TargetSchedule.

llvm-svn: 165564

This wasn't contributing anything significant to postRA heuristics except compile time (by my measurements) and will be replaced by a more general heuristic for cross-region dependencies within the scheduler itself.

llvm-svn: 165563

Use the attribute builder to add attributes to call/invoke instruction. No functionality change intended.

llvm-svn: 165562

This patch provides initial implementation of load address 
macro instruction for Mips. We have implemented two kinds 
of expansions with their variations depending on the size 
of immediate operand:

 1) load address with immediate value directly:
    * la d,j => addiu d,$zero,j   (for -32768 <= j <= 65535)
    * la d,j => lui d,hi16(j)
                ori d,d,lo16(j)   (for any other 32 bit value of j)

 2) load load address with register offset value
    * la d,j(s) => addiu d,s,j     (for -32768 <= j <= 65535)
    * la d,j(s) => lui d,hi16(j)   (for any other 32 bit value of j)
                   ori d,d,lo16(j)
                   addu d,d,s

This patch does not cover the case when the address is loaded 
from the value of the label or function.

Contributer: Vladimir Medic
llvm-svn: 165561

llvm-svn: 165559

llvm-svn: 165554

llvm-svn: 165551

llvm-svn: 165550

llvm-svn: 165548

llvm-svn: 165547

llvm-svn: 165544

llvm-svn: 165543

This keeps it out of the main flow of TableGenMain.

llvm-svn: 165542

llvm-svn: 165541

llvm-svn: 165540

llvm-svn: 165539

the test.

llvm-svn: 165535

llvm-svn: 165530

llvm-svn: 165517

clear() method.

llvm-svn: 165514

llvm-svn: 165512

llvm-svn: 165511

llvm-svn: 165510

Update EarlyCSE's SimpleValues to use Hashing.h for their hashes. Expanded the hashing and equality to allow for equality modulo commutativity for binary ops, and comparisons with swapping of predicates.

llvm-svn: 165509

New value_op_iterator for User. This allows other code to iterate over the User's operands directly as values, which can be convenient.

llvm-svn: 165508

- Teach it about dadd[i] instructions and move pseudo-instruction
- Make it parse the register names correctly (for N32 / N64)

llvm-svn: 165506

Add in the first step of the multiple pointer support. This adds in support to the data layout for specifying a per address space pointer size.
The next step is to update the optimizers to allow them to optimize the different address spaces with this information.

llvm-svn: 165505

llvm-svn: 165498

llvm-svn: 165497

llvm-svn: 165496

llvm-svn: 165495

llvm-svn: 165494

DeadArgumentElimination pass can replace one LLVM function with another,
invalidating a pointer stored in debug info metadata entry for this function.
To fix this, we collect debug info descriptors for functions before
running a DeadArgumentElimination pass and "patch" pointers in metadata nodes
if we replace a function.

llvm-svn: 165490

We use the enums to query whether an Attributes object has that attribute. The
opaque layer is responsible for knowing where that specific attribute is stored.

llvm-svn: 165488

llvm-svn: 165485

llvm-svn: 165484

Separate AVXCC and SSECC printing for cmpps/pd/ss/sd and add masking before the switch statement. This keeps the unreachable default case from being hit if the instruction was created with an intrinsic with too large of an immediate.

llvm-svn: 165483