- Mar 03, 2014
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Richard Osborne authored
Summary: Previously llvm-config --system-libs would print something like: $ llvm-config --system-libs -lz -ltinfo -lrt -ldl -lm Now we don't emit blank line. Functionality is unchanged otherwise, in particular llvm-config --libs --system-libs still emits the LLVM libraries and the system libraries on different lines. Reviewers: chapuni Reviewed By: chapuni CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2901 llvm-svn: 202719
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Daniel Sanders authored
Summary: Parts of the compiler still believed MSA load/stores have a 16-bit offset when it is actually 10-bit. Corrected this, and fixed a closely related issue this uncovered where load/stores with 10-bit and 12-bit offsets (MSA and microMIPS respectively) could not load/store using offsets from the stack/frame pointer. They accepted frameindex+offset, but not frameindex by itself. Reviewers: jacksprat, matheusalmeida Reviewed By: jacksprat Differential Revision: http://llvm-reviews.chandlerc.com/D2888 llvm-svn: 202717
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Ed Maste authored
This fixes invalid lengths in .debug_aranges on big-endian mips64 (lengths appear to be left-shifted by 32 bits) and in .debug_loc. Differential Revision: http://llvm-reviews.chandlerc.com/D2517 llvm-svn: 202716
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Vladimir Medic authored
Fixing a build failure reported by certain buildbots. This will disable jalx instruction for micromips target. llvm-svn: 202715
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Benjamin Kramer authored
llvm-svn: 202714
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Evgeniy Stepanov authored
llvm-svn: 202712
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Vladimir Medic authored
This patch implements jalx instruction for Mips architecture.This instruction executes a procedure call within the current 256 MB-aligned region and change the ISA Mode from MIPS32 to microMIPS32 or MIPS16e. Usage samples for assembler and dissasembler are provided as well. llvm-svn: 202706
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Tobias Grosser authored
This also switches the users in LLVM to ensure this functionality is tested. llvm-svn: 202705
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Chandler Carruth authored
a constructor either. Just call the constructor directly. I'll look into making this work with aggregate initialization some other time (when I have someone with MSVC 2012 handy to test ideas). llvm-svn: 202688
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Chandler Carruth authored
operand_values. The first provides a range view over operand Use objects, and the second provides a range view over the Value*s being used by those operands. The naming is "STL-style" rather than "LLVM-style" because we have historically named iterator methods STL-style, and range methods seem to have far more in common with their iterator counterparts than with "normal" APIs. Feel free to bikeshed on this one if you want, I'm happy to change these around if people feel strongly. I've switched code in SROA and LCG to exercise these mostly to ensure they work correctly -- we don't really have an easy way to unittest this and they're trivial. llvm-svn: 202687
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Chandler Carruth authored
proposed std::iterator_pair which was in committee suggested to move toward std::iterator_range. There isn't a formal paper yet, but there seems little disagreement within the committee at this point so it seems fine to provide our own version in the llvm namespace so we can easily build range adaptors for the numerous iterators in LLVM's interfaces. Note that I'm not really comfortable advocating a crazed range-based migration just yet. The range stuff is still in a great deal of flux in C++ and the committee hasn't entirely made up its mind (afaict) about how it will work. So I'm mostly trying to provide the minimal functionality needed to make writing easy and convenient range adaptors for range based for loops easy and convenient. ;] Subsequent patches will use this across the fundamental IR types, where there are iterator views. llvm-svn: 202686
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Ahmed Charles authored
Suggestion by Richard Smith. llvm-svn: 202678
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Saleem Abdulrasool authored
The diagnostics tests were missing from the previous introduction of ifeqs. llvm-svn: 202674
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Venkatraman Govindaraju authored
llvm-svn: 202670
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- Mar 02, 2014
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Venkatraman Govindaraju authored
llvm-svn: 202666
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Benjamin Kramer authored
They didn't provide any value over the default ones but blocked move semantics. llvm-svn: 202664
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Venkatraman Govindaraju authored
llvm-svn: 202663
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Benjamin Kramer authored
The interaction between defaulted operators and move elision isn't totally obvious, add a unit test so it doesn't break unintentionally. llvm-svn: 202662
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Venkatraman Govindaraju authored
llvm-svn: 202661
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Venkatraman Govindaraju authored
llvm-svn: 202660
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Hal Finkel authored
Now that the PowerPC backend can track individual CR bits as first-class registers, we should also have a way of allocating them for inline asm statements. Because these registers are only one bit, if an output variable is implicitly cast to a larger integer size, we'll get an any_extend to that larger type (this is part of the existing target-independent logic). As a result, regardless of the size of the output type, only the first bit is meaningful. The constraint identifier "wc" has been chosen for this purpose. Although gcc does not currently support allocating individual CR bits, this identifier choice has been coordinated with the gcc PowerPC team, and will be marked as reserved for this purpose in the gcc constraints.md file. llvm-svn: 202657
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Michael Kuperstein authored
This includes instructions that relate to memory access (load/store/GEP), comparison instructions and calls. Work was done by lama.saba@intel.com. llvm-svn: 202647
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Benjamin Kramer authored
The old implementation is no longer needed in C++11. llvm-svn: 202644
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Chandler Carruth authored
access to it on all host toolchains. llvm-svn: 202642
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Ahmed Charles authored
llvm-svn: 202641
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Benjamin Kramer authored
Remove the old functions. llvm-svn: 202636
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Chandler Carruth authored
assert it with an #error) that we require MSVC 2012; MSVC 2010 will no longer suffice. llvm-svn: 202631
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Craig Topper authored
llvm-svn: 202629
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Venkatraman Govindaraju authored
[SparcV9] Adds support for branch on integer register instructions (BPr) and conditional moves on integer register (MOVr/FMOVr). llvm-svn: 202628
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Elena Demikhovsky authored
llvm-svn: 202624
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Chandler Carruth authored
facilitate the nice formatting of lambdas passed there. Suggested by Chris during review of my lambda additions, and something I strongly agree with. llvm-svn: 202622
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Craig Topper authored
llvm-svn: 202621
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Chandler Carruth authored
about a few constructs in C++11 that are worth starting off in a consistent manner within the codebase. This will be matched with a change to clang-format's LLVM style which will switch the options to support C++11 and use these conventions. llvm-svn: 202620
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Craig Topper authored
llvm-svn: 202619
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Craig Topper authored
llvm-svn: 202618
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Chris Lattner authored
llvm-svn: 202617
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Venkatraman Govindaraju authored
[Sparc] Add support for parsing branches and conditional move instructions with %fcc1-%fcc3 conditional registers. llvm-svn: 202616
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Venkatraman Govindaraju authored
[Sparc] Make floating point branch instruction formats to accept %fcc0-%fcc1 conditional registers as input. No functionality change. llvm-svn: 202614
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Chandler Carruth authored
directly, and remove the macro. llvm-svn: 202612
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Venkatraman Govindaraju authored
llvm-svn: 202610
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