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  1. Jan 19, 2019
  2. Aug 10, 2015
    • James Y Knight's avatar
      [Sparc] Implement i64 load/store support for 32-bit sparc. · 3994be87
      James Y Knight authored
      The LDD/STD instructions can load/store a 64bit quantity from/to
      memory to/from a consecutive even/odd pair of (32-bit) registers. They
      are part of SparcV8, and also present in SparcV9. (Although deprecated
      there, as you can store 64bits in one register).
      
      As recommended on llvmdev in the thread "How to enable use of 64bit
      load/store for 32bit architecture" from Apr 2015, I've modeled the
      64-bit load/store operations as working on a v2i32 type, rather than
      making i64 a legal type, but with few legal operations. The latter
      does not (currently) work, as there is much code in llvm which assumes
      that if i64 is legal, operations like "add" will actually work on it.
      
      The same assumption does not hold for v2i32 -- for vector types, it is
      workable to support only load/store, and expand everything else.
      
      This patch:
      - Adds a new register class, IntPair, for even/odd pairs of registers.
      
      - Modifies the list of reserved registers, the stack spilling code,
        and register copying code to support the IntPair register class.
      
      - Adds support in AsmParser. (note that in asm text, you write the
        name of the first register of the pair only. So the parser has to
        morph the single register into the equivalent paired register).
      
      - Adds the new instructions themselves (LDD/STD/LDDA/STDA).
      
      - Hooks up the instructions and registers as a vector type v2i32. Adds
        custom legalizer to transform i64 load/stores into v2i32 load/stores
        and bitcasts, so that the new instructions can actually be
        generated, and marks all operations other than load/store on v2i32
        as needing to be expanded.
      
      - Copies the unfortunate SelectInlineAsm hack from ARMISelDAGToDAG.
        This hack undoes the transformation of i64 operands into two
        arbitrarily-allocated separate i32 registers in
        SelectionDAGBuilder. and instead passes them in a single
        IntPair. (Arbitrarily allocated registers are not useful, asm code
        expects to be receiving a pair, which can be passed to ldd/std.)
      
      Also adds a bunch of test cases covering all the bugs I've added along
      the way.
      
      Differential Revision: http://reviews.llvm.org/D8713
      
      llvm-svn: 244484
      3994be87
  3. Jan 25, 2012
  4. Jul 13, 2007
    • Gabor Greif's avatar
      * llvm.spec.in: update blurb · f307d942
      Gabor Greif authored
      * autoconf/AutoRegen.sh: use variables for autofoo versions
      * autoconf/configure.ac: test for some more functions
                               that are not guaranteed on solaris
      
      Note: the svn:mime-type of autoconf/AutoRegen.sh
            should be set to something that allows for
      			text compares using svn diff
      llvm-svn: 39800
      f307d942
  5. Aug 21, 2006
  6. Aug 16, 2006
  7. Apr 07, 2006
    • Reid Spencer's avatar
      For PR723: · 5a6537d6
      Reid Spencer authored
      Configure with the --enable-optimized and --enable-assertions option to
      ensure that binary RPM packages are built with the options required by the
      feature request.
      
      llvm-svn: 27489
      5a6537d6
  8. May 18, 2005
  9. May 14, 2005
  10. Aug 16, 2004
  11. Feb 10, 2004
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