When processing possible aliases, TableGen assumes that if an operand *can* be
an immediate, then it always *will* be. This is incorrect for the AArch64
backend. This patch inserts a check in the generated code to make sure isImm is
true first.

llvm-svn: 171972

fp128 is almost but not quite completely illegal as a type on AArch64. As a
result it needs to have a register class (for argument passing mainly), but all
operations need to be lowered to runtime calls. Currently there's no way for
targets to do this (without duplicating code), as the relevant functions are
hidden in SelectionDAG. This patch changes that.

llvm-svn: 171971

We need this to correctly fix ASTMatchers/ASTTypeTraits.h in clang.

llvm-svn: 171965

llvm-svn: 171960

llvm-svn: 171956

llvm-svn: 171954

PR 14848. The lowered sequence is based on the existing sequence the target-independent
DAG Combiner creates for the scalar case.

Patch by Zvi Rackover.

llvm-svn: 171953

llvm-svn: 171951

address space. Reordered the EmitULEB128IntValue arguments to
make this easier.

llvm-svn: 171949

This was an experimental option, but needs to be defined
per-target. e.g. PPC A2 needs to aggressively hide latency.

I converted some in-order scheduling tests to A2. Hal is working on
more test cases.

llvm-svn: 171946

test/DebugInfo/member-pointers.ll would not fail in targetting BE any more.

llvm-svn: 171943

Now BangOperator should be nicely hyperlinked.

Pointed out by Joel Jones.

llvm-svn: 171942

Suggested by Joel Jones.

llvm-svn: 171941

llvm-svn: 171940

It's clearer and additionally this gets rid of the usage of `DefmID`,
which doesn't really correspond to anything in the language (it was just
used in the name of this parsing function which parsed a `MultiClassID`
and returned that multiclass's record).

This area of the code still needs a lot of work.

llvm-svn: 171938

llvm-svn: 171937

llvm-svn: 171936

It's not just def's but actually a limited subset of Object's that are
allowed inside a multiclass.

Spotted by Joel Jones.

llvm-svn: 171935

them.

llvm-svn: 171933

them and add one where it seemed obvious that we wanted one.

llvm-svn: 171932

llvm-svn: 171931

llvm-svn: 171930

Cost Model: Move the 'max unroll factor' variable to the TTI and add initial Cost Model support on ARM.

llvm-svn: 171928

This is easier implemented now that bundle flags are symmetric.

llvm-svn: 171927

(There already has a concise comment to the declaration.)

Thank Eric Christopher for his feedback!

llvm-svn: 171926

llvm-svn: 171924

This is causing some problems. The root cause is unknown at this time.

llvm-svn: 171923

  - this expression is explicitly marked no-signed-zero, or
  - no-signed-zero of this expression can be derived from some context.

llvm-svn: 171922

llvm-svn: 171905

method because getContents().size() already covers it. So computeFragmentSize
can use the generic MCEncodedFragment interface when querying both Data and
Relaxable fragments for contents sizes.

No change in functionality

llvm-svn: 171903

Stop using BumpPtrAllocator for HNodes because
they have fields (vector, map) which require HNode 
destructors to be run.

llvm-svn: 171896

This avoids FileCheck failing over different comment characters in
assembly (notably powerpc64 on Linux vs Darwin) and should fix David's
build-bot.

llvm-svn: 171886

an R_MIPS_GPREL16 relocation.


Contributer: Jack Carter
llvm-svn: 171882

value in the 64 bit .eh_frame section.

It doesn't however allow exception handling to work
yet since it depends on the correct relocation model
being set in the ELF header flags.


Contributer: Jack Carter
llvm-svn: 171881

The current Intel Atom microarchitecture has a feature whereby
when a function returns early then it is slightly faster to execute
a sequence of NOP instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction until
the return address is ready.

When compiling for X86 Atom only, this patch will run a pass,
called "X86PadShortFunction" which will add NOP instructions where less
than four cycles elapse between function entry and return.

It includes tests.

This patch has been updated to address Nadav's review comments
- Optimize only at >= O1 and don't do optimization if -Os is set
- Stores MachineBasicBlock* instead of BBNum
- Uses DenseMap instead of std::map
- Fixes placement of braces

Patch by Andy Zhang.

llvm-svn: 171879

llvm-svn: 171873

llvm-svn: 171872

Code cleanup: refactor the switch statements in the generation of reduction variables into an IR builder call.

llvm-svn: 171871

llvm-svn: 171868

llvm-svn: 171867