Commits · 5ad2eeeadaf15856332f66ed7c244d52a86b0be7 · Roger Ferrer / llvm-epi · GitLab

May 13, 2021
- Support unwinding from inline assembly · 8ec9fd48
  cynecx authored May 13, 2021
  8ec9fd48
- [PowerPC] Add ROP Protection to prologue and epilogue · 54310fc1
  Stefan Pintilie authored May 13, 2021
  54310fc1
- [ARM] Constrain CMPZ shift combine to a single use · 1011d4ed
  David Green authored May 13, 2021
  1011d4ed
- [InstSimplify] Remove redundant {insert,extract}_vector intrinsic chains · 2ed7db0d
  Joe Ellis authored May 13, 2021
  2ed7db0d
- [AMDGPU] Only allow global fp atomics with unsafe option · 8f98356b
  Stanislav Mekhanoshin authored May 12, 2021
  8f98356b
- [AArch64][SVE] Fix missed immediate selection due to mishandling of signedness · b1a07495
  Bradley Smith authored May 04, 2021
  b1a07495
- [TableGen] Make the NUL character invalid in .td files · fe9101c3
  Paul C. Anagnostopoulos authored May 11, 2021
  fe9101c3
- Reapply [ConstantFold] Fold more operations to poison · 395607af
  Juneyoung Lee authored Nov 29, 2020
  395607af
- [PowerPC] Handle inline assembly clobber of link regsiter · 15051f0b
  Stefan Pintilie authored May 13, 2021
  15051f0b
- [VPlan] Adjust assert in splitBlock to allow splitting at end. · bdada754
  Florian Hahn authored May 13, 2021
  bdada754
- [X86] X86ExpandPseudo.cpp - try to pass DebugLoc by const-ref to avoid costly... · ba0ec1be
  Simon Pilgrim authored May 13, 2021
  ba0ec1be
- [X86] X86InstrInfo.cpp - try to pass DebugLoc by const-ref to avoid costly... · 49566556
  Simon Pilgrim authored May 13, 2021
  49566556
- [X86] VZeroUpperInserter::insertVZeroUpper - avoid DebugLoc creation by... · 9dfc4ac4
  Simon Pilgrim authored May 13, 2021
  9dfc4ac4
- [Passes] Run GlobalsAA before LICM during LTO in new PM. · 860b3752
  Florian Hahn authored May 13, 2021
  860b3752
- [Passes] Use MemorySSA for LICM during LTO. · 3eaf2358
  Florian Hahn authored May 13, 2021
  3eaf2358
- [PowerPC] Provide doubleword vector predicate form comparisons on Power7 · 39e4676c
  Nemanja Ivanovic authored May 12, 2021
  39e4676c
- [SCEV] Apply guards to max with non-unitary steps. · e2759f11
  Florian Hahn authored May 13, 2021
  e2759f11
- Revert "[SimpleLoopUnswitch] Port partially invariant unswitch from... · 107d19eb
  Jingu Kang authored May 13, 2021
  107d19eb
- [FPEnv][X86] Implement lowering of llvm.set.rounding · 12537ab7
  Serge Pavlov authored May 13, 2021
  12537ab7
- [GC][NFC] Move GCStrategy from CodeGen to IR · d8b37de8
  Max Kazantsev authored May 12, 2021
  d8b37de8
- [Coroutines] Salvege Debug.values · c1359ef0
  Chuanqi Xu authored May 13, 2021
  c1359ef0
- [Coroutines] Enable printing coroutine frame when dbg info is available · 6e5b8f48
  Chuanqi Xu authored May 13, 2021
  6e5b8f48
- [SLP] Add insertelement instructions to vectorizable tree · ab2c499d
  Anton Afanasyev authored Mar 16, 2021
  ab2c499d
- [Debug-Info] add -gstrict-dwarf support in backend · a0ca4c46
  Chen Zheng authored May 09, 2021
  a0ca4c46
- [AMDGPU] Refactor shouldExpandAtomicRMWInIR(). NFC. · bd00106d
  Stanislav Mekhanoshin authored May 12, 2021
  bd00106d
- Change the context instruction for computeKnownBits in LoadStoreVectorizer pass · e7d26ace
  Justin Bogner authored May 12, 2021
  e7d26ace
- Optimize GSymCreator::finalize. · e5bdacba
  Greg Clayton authored May 12, 2021
  e5bdacba
May 12, 2021
- [lld][WebAssembly] Allow data symbols to extend past end of segment · cd01430f
  Sam Clegg authored May 11, 2021
  cd01430f
- [WebAssembly] Add TLS data segment flag: WASM_SEG_FLAG_TLS · 3041b16f
  Sam Clegg authored May 10, 2021
  3041b16f
- [WebAssembly] Allow Wasm EH with Emscripten SjLj · ba38b72e
  Heejin Ahn authored May 12, 2021
  ba38b72e
- [RISCV] Remove RISCVII:VSEW enum. Make encodeVYPE operate directly on SEW. · 9c345407
  Craig Topper authored May 12, 2021
  9c345407
- [InstCombine] Support one-hot merge for logical and/or · a8f7dee1
  Nikita Popov authored May 11, 2021
  a8f7dee1
- [LoopFlatten] Simplify loops so that the pass can operate on unsimplified loops. · 1124ad2f
  Stelios Ioannou authored May 11, 2021
  1124ad2f
- [X86] Fix -Wunused-lambda-capture · 0fe6649b
  Fangrui Song authored May 12, 2021
  
  0fe6649b
- [X86][AVX] Fold concat(ps*lq(x,32),ps*lq(y,32)) -> shuffle(concat(x,y),zero) (PR46621) · fb1d61b7
  Simon Pilgrim authored May 12, 2021
  fb1d61b7
- [AArch64][GlobalISel] Add MMOs to constant pool loads to allow LICM hoisting. · dc8d16c0
  Amara Emerson authored May 12, 2021
  dc8d16c0
- [PowerPC] Fix definitions of CMPRB8, CMPEQB, CMPRB, SETB in PPCInstr64Bit.td and PPCInstrInfo.td · cf4610d2
  Victor Huang authored May 12, 2021
  
  cf4610d2
- [AMDGPU] Disable the SIFormMemoryClauses pass at -O1 · 5885f1a4
  Baptiste Saleil authored May 12, 2021
  5885f1a4
- [X86][AVX] combineConcatVectorOps - add ConcatSubOperand helper. NFCI. · 7bff9bdd
  Simon Pilgrim authored May 12, 2021
  7bff9bdd
- [TargetLowering] Improve legalization of scalable vector types · c5ec00e6
  Fraser Cormack authored May 07, 2021
  c5ec00e6