Commits · 5af3fb2b94bf21c0be40da03302e7169bc7d61a3 · Roger Ferrer / llvm-epi · GitLab

Mar 26, 2018
- Test commit - adding a new line. · 5bf31e1e
  Carlos Alberto Enciso authored Mar 26, 2018
  5bf31e1e
- [LoopUnroll] Fix dangling pointers in SCEV · a5574931
  Max Kazantsev authored Mar 26, 2018
  a5574931
- Revert r328386 "[X86] Fix Windows `i1 zeroext` conventions to use i8 instead of i32" · 311b63f1
  Hans Wennborg authored Mar 26, 2018
  311b63f1
- [DeadArgElim] Strip allocsize attributes when deleting an argument. · 8840f644
  Benjamin Kramer authored Mar 26, 2018
  8840f644
- [IRCE] Enable increasing loops of variable bounds · 53a423a4
  Sam Parker authored Mar 26, 2018
  53a423a4
- [X86] Fix the SchedRW for intrinsic register form of SQRT/RCP/RSQRT. · 6f28d3c9
  Craig Topper authored Mar 26, 2018
  6f28d3c9
- [X86] Merge the SSE and AVX versions of fp divs and sqrts in the... · cdfcf8ec
  Craig Topper authored Mar 26, 2018
  cdfcf8ec
- [X86] Add itinerary to intrinsic version of sqrtss, rcpss, and rsqrtss instructions. · fbf2d850
  Craig Topper authored Mar 26, 2018
  fbf2d850
- [X86] Swap the itineraries on the memory and register forms of CVTDQ2PD. · 659f85af
  Craig Topper authored Mar 26, 2018
  659f85af
- [X86] Move (v)movss to port 5 only for Skylake. Move (v)movups/d to port 015 for Skylake. · 15fef89a
  Craig Topper authored Mar 25, 2018
  15fef89a
Mar 25, 2018
- [PatternMatch] allow undef elements when matching vector FP +0.0 · 93e64dd9
  Sanjay Patel authored Mar 25, 2018
  93e64dd9
- [InstSimplify, InstCombine] add/update tests with FP +0.0 vector with undef; NFC · c84b48ec
  Sanjay Patel authored Mar 25, 2018
  c84b48ec
- [X86] Update cost model for Goldmont. Add fsqrt costs for Silvermont · a985919d
  Craig Topper authored Mar 25, 2018
  a985919d
- [InstCombine] adjust test comments; NFC · e94a8553
  Sanjay Patel authored Mar 25, 2018
  e94a8553
- [InstCombine] consolidate casted icmp vector tests · 60d0e119
  Sanjay Patel authored Mar 25, 2018
  60d0e119
- [InstCombine] peek through more icmp of FP cast + bitcast · 841aac04
  Sanjay Patel authored Mar 25, 2018
  841aac04
Mar 24, 2018
- [RISCV] Use init_array instead of ctors for RISCV target, by default · 98bc25a0
  Mandeep Singh Grang authored Mar 24, 2018
  98bc25a0
- [InstCombine] peek through FP casts for sign-bit compares (PR36682) · 745a9c62
  Sanjay Patel authored Mar 24, 2018
  745a9c62
- [X86][AES] Ensure we're testing both non-VEX/VEX variants of AES instructions on AVX targets · 913345f8
  Simon Pilgrim authored Mar 24, 2018
  913345f8
- [X86][SSE] Ensure we're testing both non-VEX/VEX variants of SSE instructions on AVX targets · 91fe24b8
  Simon Pilgrim authored Mar 24, 2018
  91fe24b8
- [InstCombine] add multi-use/vector tests for intrinsic shrinking; NFC · 6a176d52
  Sanjay Patel authored Mar 24, 2018
  6a176d52
- [X86][AVX1] Ensure we don't use later instruction sets in AVX1 schedule tests · f7d0f7e6
  Simon Pilgrim authored Mar 24, 2018
  f7d0f7e6
- [X86][AVX2] Ensure we don't use later instruction sets in AVX2 schedule tests · d2016f95
  Simon Pilgrim authored Mar 24, 2018
  d2016f95
- Add REQUIRES lines for the targets being checked in this test. · 40eb3460
  Eric Christopher authored Mar 24, 2018
  40eb3460
- [X86] Add a DAG combine to simplify PMULDQ/PMULUDQ nodes · 2c0a62ab
  Craig Topper authored Mar 24, 2018
  2c0a62ab
- Allow FDE references outside the +/-2GB range supported by PC relative · fe6e6d93
  Eric Christopher authored Mar 24, 2018
  fe6e6d93
- [X86] Fix Windows `i1 zeroext` conventions to use i8 instead of i32 · e27b4106
  Reid Kleckner authored Mar 23, 2018
  e27b4106
Mar 23, 2018
- [PM][FunctionAttrs] add NoUnwind attribute inference to PostOrderFunctionAttrs pass · 6660fd0f
  Fedor Sergeev authored Mar 23, 2018
  6660fd0f
- [InstCombine] increase test coverage for intrinsic shrinking; NFC · 9b09fe9f
  Sanjay Patel authored Mar 23, 2018
  9b09fe9f
- [Hexagon] Boost profit for word-mask immediates, reduce for others · bcf0a96f
  Krzysztof Parzyszek authored Mar 23, 2018
  bcf0a96f
- [Hexagon] Fold offset in base+immediate loads/stores · e247526c
  Krzysztof Parzyszek authored Mar 23, 2018
  e247526c
- [AMDGPU] Update OpenCL to use 48 bytes of implicit arguments for AMDGPU · 88441a3d
  Tony Tye authored Mar 23, 2018
  88441a3d
- [AMDGPU] Remove use of OpenCL triple environment and replace with function attribute for AMDGPU · 7a893d4e
  Tony Tye authored Mar 23, 2018
  7a893d4e
- [Hexagon] Always generate mux out of predicated transfers if possible · 5f7ba9a7
  Krzysztof Parzyszek authored Mar 23, 2018
  5f7ba9a7
- [Hexagon] Avoid early if-conversion for one sided branches · 80f10e4f
  Krzysztof Parzyszek authored Mar 23, 2018
  80f10e4f
- [X86][Btver2] Cleanup TEST instructions to use JFPA (+JFPX on ymms) function unit · 6c63e6c2
  Simon Pilgrim authored Mar 23, 2018
  6c63e6c2
- [HWASan] Port HWASan to Linux x86-64 (LLVM) · 83e78414
  Alex Shlyapnikov authored Mar 23, 2018
  83e78414
- [ARM] Fix "Constant pool entry out of range!" in Thumb1 mode · 41573804
  Ana Pazos authored Mar 23, 2018
  41573804
- [Hexagon] Two fixes in early if-conversion · 570c6440
  Krzysztof Parzyszek authored Mar 23, 2018
  570c6440
- [X86][Btver2] Cleanup MOVMSK instructions to use JFPA function unit · e5c0a041
  Simon Pilgrim authored Mar 23, 2018
  e5c0a041