Commits · 7f9be0fdc187cc6db7673e2faa8b0c977952f945 · Roger Ferrer / llvm-epi · GitLab

Oct 27, 2011
- Don't crash on 128-bit sdiv by constant. Found by inspection. · e9e356ad
  Eli Friedman authored Oct 27, 2011
  e9e356ad
Oct 26, 2011
- Run test with -verify-machineinstrs. · f5a15529
  Rafael Espindola authored Oct 26, 2011
  f5a15529
- Fixes an issue reported by -verify-machineinstrs. · b3285224
  Rafael Espindola authored Oct 26, 2011
  b3285224
- This commit introduces two fake instructions MORESTACK_RET and · 66393c12
  Rafael Espindola authored Oct 26, 2011
  66393c12
Oct 23, 2011
- Completely re-write the algorithm behind MachineBlockPlacement based on · bd1be4d0
  Chandler Carruth authored Oct 23, 2011
  bd1be4d0
Oct 22, 2011
- Fix pr11193. · e649d665
  Nadav Rotem authored Oct 22, 2011
  e649d665
Oct 21, 2011
- Fix pr11194. When promoting and splitting integers we need to use · 5e00bb5f
  Nadav Rotem authored Oct 21, 2011
  5e00bb5f
- Don't hard code the desired alignment for loops -- it isn't 16-bytes on · 70a38058
  Chandler Carruth authored Oct 21, 2011
  70a38058
- 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type. · d315157f
  Nadav Rotem authored Oct 21, 2011
  d315157f
- Add loop aligning to MachineBlockPlacement based on review discussion so · 8b9737cb
  Chandler Carruth authored Oct 21, 2011
  8b9737cb
- Add a very basic test for MachineBlockPlacement. This is essentially the · ddfeaafd
  Chandler Carruth authored Oct 21, 2011
  ddfeaafd
- Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with... · 039a7906
  Craig Topper authored Oct 21, 2011
  039a7906
Oct 20, 2011
- Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10291355 · 54d678ff
  Evan Cheng authored Oct 19, 2011
  54d678ff
Oct 19, 2011
- Improve code generation for vselect on SSE2: · 8824472a
  Nadav Rotem authored Oct 19, 2011
  8824472a
- Add support for the vector-widening of vselect and vector-setcc · 6652e22b
  Nadav Rotem authored Oct 19, 2011
  6652e22b
- Rename PEXTR to PEXT. Add intrinsics for BMI instructions. · ef309c33
  Craig Topper authored Oct 19, 2011
  ef309c33
- Added testcase for <rdar://problem/10215997 > · 20a04e74
  Lang Hames authored Oct 18, 2011
  20a04e74
- Add additional element-promotion tests. · 0d339335
  Nadav Rotem authored Oct 18, 2011
  0d339335
- Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Index starts with zero. · 75c2229f
  Nadav Rotem authored Oct 18, 2011
  75c2229f
Oct 18, 2011
- Add support for a new extension to the .file directive: · 40f8f2ff
  Nick Lewycky authored Oct 17, 2011
  40f8f2ff
Oct 17, 2011
- stabalize tests by specifying the exact sse level · 28e4f67f
  Nadav Rotem authored Oct 17, 2011
  28e4f67f
- Clean the triple, add check lines. · 83d1a93c
  Nadav Rotem authored Oct 17, 2011
  83d1a93c
- Previously v2i32 vectors were legalized to v4i32. Now, they are legalized to · 89c282e9
  Nadav Rotem authored Oct 17, 2011
  89c282e9
Oct 16, 2011
- Add tripple and stabalize a few more tests. · 053a7358
  Nadav Rotem authored Oct 16, 2011
  053a7358
- Add triple to tests. · a6b6566d
  Nadav Rotem authored Oct 16, 2011
  a6b6566d
- fix a typo in the test · 9513104d
  Nadav Rotem authored Oct 16, 2011
  9513104d
- Enable element promotion type legalization by deafault. · 486ff59a
  Nadav Rotem authored Oct 16, 2011
  486ff59a
Oct 14, 2011
- Update live-in lists when splitting critical edges. · 06b6ccfe
  Jakob Stoklund Olesen authored Oct 14, 2011
  06b6ccfe
- Add X86 ANDN instruction. Including instruction selection. · 965de2c1
  Craig Topper authored Oct 14, 2011
  965de2c1
- Add X86 TZCNT instruction and patterns to select it. Also added core-avx2... · 3657fe4b
  Craig Topper authored Oct 14, 2011
  3657fe4b
- Add value numbers when spilling dead defs. · 7fb5632e
  Jakob Stoklund Olesen authored Oct 14, 2011
  7fb5632e
Oct 13, 2011
- Force CPU type on test so it doesn't accidentally emit movbe instead of bswap on Intel Atom CPUs. · f07d898a
  Benjamin Kramer authored Oct 13, 2011
  f07d898a
- More closely follow libgcc, which has code after the `ret' instruction to · 25f6d3e3
  Bill Wendling authored Oct 13, 2011
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- Revert r141854 because it was causing failures: · 063f55ff
  Bill Wendling authored Oct 13, 2011
  063f55ff
- Should not add instructions to a BB after a return instruction. The machine... · 22a690e3
  Bill Wendling authored Oct 13, 2011
  22a690e3
- Add X86 TZCNT instruction and patterns to select it. Also added core-avx2... · 8cc93880
  Craig Topper authored Oct 13, 2011
  8cc93880
- Also inflate register classes around inline asm. · 068dc91d
  Jakob Stoklund Olesen authored Oct 12, 2011
  068dc91d
- We need to verify that the machine instruction we're using as a replacement for · 3e5409df
  Bill Wendling authored Oct 12, 2011
  3e5409df
Oct 12, 2011
- Make this test more specific. There are 3 stats that matched "machine-licm". · 2d3ea9b2
  Bob Wilson authored Oct 11, 2011
  2d3ea9b2
- Add a new wrapper node for a DILexicalBlock that encapsulates it and a · 6647b830
  Eric Christopher authored Oct 11, 2011
  6647b830