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  1. Jan 29, 2019
  2. Jan 28, 2019
    • Teresa Johnson's avatar
      [ThinLTO] Refine reachability check to fix compile time increase · 5b2f6a1b
      Teresa Johnson authored
      Summary:
      A recent fix to the ThinLTO whole program dead code elimination (D56117)
      increased the thin link time on a large MSAN'ed binary by 2x.
      It's likely that the time increased elsewhere, but was more noticeable
      here since it was already large and ended up timing out.
      
      That change made it so we would repeatedly scan all copies of linkonce
      symbols for liveness every time they were encountered during the graph
      traversal. This was needed since we only mark one copy of an aliasee as
      live when we encounter a live alias. This patch fixes the issue in a
      more efficient manner by simply proactively visiting the aliasee (thus
      marking all copies live) when we encounter a live alias.
      
      Two notes: One, this requires a hash table lookup (finding the aliasee
      summary in the index based on aliasee GUID). However, the impact of this
      seems to be small compared to the original pre-D56117 thin link time. It
      could be addressed if we keep the aliasee ValueInfo in the alias summary
      instead of the aliasee GUID, which I am exploring in a separate patch.
      
      Second, we only populate the aliasee GUID field when reading summaries
      from bitcode (whether we are reading individual summaries and merging on
      the fly to form the compiled index, or reading in a serialized combined
      index). Thankfully, that's currently the only way we can get to this
      code as we don't yet support reading summaries from LLVM assembly
      directly into a tool that performs the thin link (they must be converted
      to bitcode first). I added a FIXME, however I have the fix under test
      already. The easiest fix is to simply populate this field always, which
      isn't hard, but more likely the change I am exploring to store the
      ValueInfo instead as described above will subsume this. I don't want to
      hold up the regression fix for this though.
      
      Reviewers: trentxintong
      
      Subscribers: mehdi_amini, inglorion, dexonsmith, llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D57203
      
      llvm-svn: 352438
      5b2f6a1b
    • Sanjay Patel's avatar
      [CGP] auto-generate complete checks for add overflow tests; NFC · a36a293a
      Sanjay Patel authored
      llvm-svn: 352437
      a36a293a
    • Craig Topper's avatar
      Recommit r352255 "[SelectionDAG][X86] Don't use SEXTLOAD for promoting masked... · 390ac61b
      Craig Topper authored
      Recommit r352255 "[SelectionDAG][X86] Don't use SEXTLOAD for promoting masked loads in the type legalizer"
      
      This did not cause the buildbot failure it was previously reverted for.
      
      Original commit message:
      
      I'm not sure why we were using SEXTLOAD. EXTLOAD seems more appropriate since we don't care about the upper bits.
      
      This patch changes this and then modifies the X86 post legalization combine to emit a extending shuffle instead of a sign_extend_vector_inreg. Could maybe use an any_extend_vector_inre
      
      On AVX512 targets I think we might be able to use a masked vpmovzx and not have to expand this at all.
      
      llvm-svn: 352433
      390ac61b
    • Yonghong Song's avatar
      [RuntimeDyld] load all sections with ProcessAllSections · 61bc1d7e
      Yonghong Song authored
      This patch tried to address the following use case.
        . bcc (https://github.com/iovisor/bcc
      
      ) utilizes llvm JIT to
          compile for BTF target.
        . with -g, .BTF and .BTF.ext sections (BPF debug info)
          will be generated by LLVM.
        . .BTF does not have relocations and .BTF.ext has some
          relocations.
        . With ProcessAllSections, .BTF.ext is loaded by JIT dynamic linker
          and is available to application. But .BTF is not loaded.
      
      The bcc application needs both .BTF.ext and .BTF for debugging
      purpose, and .BTF is not loaded. This patch addressed this issue
      by iterating over all sections and loading any missing
      sections, after symbol/relocation processing in loadObjectImpl().
      
      Signed-off-by: default avatarYonghong Song <yhs@fb.com>
      
      Differential Revision: https://reviews.llvm.org/D55943
      
      llvm-svn: 352432
      61bc1d7e
    • Reid Kleckner's avatar
      [ARM] Deduplicate table generated CC analysis code · 27fd307b
      Reid Kleckner authored
      Create ARMCallingConv.cpp and emit code for calling convention analysis
      from there.
      
      llvm-svn: 352431
      27fd307b
    • Reid Kleckner's avatar
      [AArch64] Include AArch64GenCallingConv.inc once · 96c581d7
      Reid Kleckner authored
      Summary:
      Avoids duplicating generated static helpers for calling convention
      analysis.
      
      This also means you can modify AArch64CallingConv.td without recompiling
      the AArch64ISelLowering.cpp monolith, so it provides faster incremental
      rebuilds.
      
      Saves 12K in llc.exe, but adds a new object file, which is large.
      
      Reviewers: efriedma, t.p.northover
      
      Subscribers: mgorny, javed.absar, kristof.beyls, hiraditya, llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D56948
      
      llvm-svn: 352430
      96c581d7
    • Jessica Paquette's avatar
      [GlobalISel][AArch64] Add legalization for G_FLOG · 2d73ecd0
      Jessica Paquette authored
      This adds support for legalizing G_FLOG into a RTLib call.
      
      It adds a legalizer test, and updates the existing floating point tests.
      
      https://reviews.llvm.org/D57347
      
      llvm-svn: 352429
      2d73ecd0
    • Sanjay Patel's avatar
      [InstCombine] add another saturating uadd test (no undefs); NFC · 89654116
      Sanjay Patel authored
      I forgot that our undef matching hasn't been completed in the previous commit.
      
      llvm-svn: 352424
      89654116
    • Sanjay Patel's avatar
      [InstCombine] add tests for saturating uadd with constant; NFC · dc543300
      Sanjay Patel authored
      llvm-svn: 352423
      dc543300
    • Matt Arsenault's avatar
      AMDGPU: Add DS append/consume intrinsics · cdd191d9
      Matt Arsenault authored
      Since these pass the pointer in m0 unlike other DS instructions, these
      need to worry about whether the address is uniform or not. This
      assumes the address is dynamically uniform, and just uses
      readfirstlane to get a copy into an SGPR.
      
      I don't know if these have the same 16-bit add for the addressing mode
      offset problem on SI or not, but I've just assumed they do.
      
      Also includes some misc. changes to avoid test differences between the
      LDS and GDS versions.
      
      llvm-svn: 352422
      cdd191d9
    • Nico Weber's avatar
      gn build: Add get.py script to download prebuilt gn, make gn.py run downloaded... · 285becfa
      Nico Weber authored
      gn build: Add get.py script to download prebuilt gn, make gn.py run downloaded gn if gn is not on PATH
      
      Prebuilts are available for x86_64 Linux, macOS, Windows. The script always
      pulls the latest GN version.
      
      Differential Revision: https://reviews.llvm.org/D57256
      
      llvm-svn: 352420
      285becfa
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