llvm-svn: 179665

CR feedback from Rafael Espindola and Paul Robinson.

llvm-svn: 179664

llvm-svn: 179663

Differential Revision: http://llvm-reviews.chandlerc.com/D620

llvm-svn: 179661

This patch allows the Mips assembler to parse and emit nested 
expressions as instruction operands. It also extends the 
expansion of memory instructions when an offset is given as 
an expression. 

Contributer: Vladimir Medic
llvm-svn: 179657

cases to be submitted on clang side shortly.
rdar://13663768 and PR15760

llvm-svn: 179655

llvm-svn: 179648

llvm-svn: 179647

llvm-svn: 179646

llvm-svn: 179645

llvm-svn: 179622

llvm-svn: 179621

    
I intend to extend the test with more offset folding checks

llvm-svn: 179620

llvm-svn: 179619

llvm-svn: 179611

llvm-svn: 179610

llvm-svn: 179607

llvm-svn: 179601

llvm-svn: 179593

llvm-svn: 179591

llvm-objdump: Don't print contents of BSS sections: it makes no sense and crashes llvm-objdump on relocated objects with large bss

llvm-svn: 179589

LLVMGetThreadLocalMode - exposes GlobalVariable::getThreadLocalMode
LLVMSetThreadLocalMode - exposes GlobalVariable::setThreadLocalMode
LLVMIsExternallyInitialized - exposes GlobalVariable::isExternallyInitialized
LLVMSetExternallyInitialized - exposes GlobalVariable::setExternallyInitialized
LLVMThreadLocalMode - maps to GlobalVariable::ThreadLocalMode

Patch by Moritz Maxeiner!

llvm-svn: 179588

If a switch instruction has a case for every possible value of its type,
with the same successor, SimplifyCFG would replace it with an icmp ult,
but the computation of the bound overflows in that case, which inverts
the test.

Patch by Jed Davis!

llvm-svn: 179587

llvm-svn: 179582

These are aliases for VACGT and VACGE, respectively, with the source
operands reversed.

rdar://13638090

llvm-svn: 179575

Two return types are not equivalent if one is a pointer and the other is an
integral. This is because we cannot bitcast a pointer to an integral value.
PR15185

llvm-svn: 179569

This patch allows the assembler to recognize $fcc0 
as a valid register for conditional move instructions. 

Corresponding test cases have been added.

Contributer: Vladimir Medic
llvm-svn: 179567

Fix a grammar mistake, and add a line about the two phases that the BB/SLP vectorizers have (top-down and bottom-up). 

llvm-svn: 179566

llvm-svn: 179565

llvm-svn: 179564

SLPVectorizer: Make it a function pass and add code for hoisting the vector-gather sequence out of loops.

llvm-svn: 179562

llvm-svn: 179551

Looks like it was evaluating undef == undef to true.

llvm-svn: 179549

Instead of emitting config values in a predefined order, the code
emitter will now emit a 32-bit register index followed by the 32-bit
config value.

llvm-svn: 179546

llvm-svn: 179545

llvm-svn: 179544

llvm-svn: 179542

llvm-svn: 179541

No content changes.

llvm-svn: 179540

llvm-svn: 179536