llvm-svn: 272598

This follows the approach in r263208 (for GVN) pretty closely:
- move the bulk of the body of the function to the new PM class.
- expose a runImpl method on the new-PM class that takes the IRUnitT and
  pointers/references to any analyses and use that to implement the
  old-PM class.
- use a private namespace in the header for stuff that used to be file
  scope

llvm-svn: 272597

Pass AliasAnalyis and MemoryDepResult around. This is in preparation
for porting this pass to the new PM.

llvm-svn: 272595

Save machine function pointer so that
the reference does not need to be passed around.

This also gives other methods access to machine
function for information such as entry count etc.

 

llvm-svn: 272594

This is a bit gnarly since LVI is maintaining its own cache.
I think this port could be somewhat cleaner, but I'd rather not spend
too much time on it while we still have the old pass hanging around and
limiting how much we can clean things up.
Once the old pass is gone it will be easier (less time spent) to clean
it up anyway.

This is the last dependency needed for porting JumpThreading which I'll
do in a follow-up commit (there's no printer pass for LVI or anything to
test it, so porting a pass that depends on it seems best).

I've been mostly following:
r269370 / D18834 which ported Dependence Analysis
r268601 / D19839 which ported BPI

llvm-svn: 272593

so it is the same as the MCExternalSymbolizer.

rdar://17349181

llvm-svn: 272588

This is third patch to clean up the code.

Included in this patch:
1. Further unclutter trace/chain formation main routine;
2. Isolate the logic to compute global cost/conflict detection
   into its own method;
3. Heavily document the selection algorithm;
4. Added helper hook to allow PGO specific logic to be
   added in the future.
 

llvm-svn: 272582

In rL272580 I accidentally added a test case to test/CodeGen when
test/Transforms/DeadStoreElimination/ is a better place for it.

llvm-svn: 272581

Summary:
AAResults::callCapturesBefore would previously ignore operand
bundles. It was possible for a later instruction to miss its memory
dependency on a call site that would only access the pointer through a
bundle.

Patch by Oscar Blumberg!

Reviewers: sanjoy

Differential Revision: http://reviews.llvm.org/D21286

llvm-svn: 272580

Broken by r272578. I didn't realize that the default move ctor
complaints would happen for non-template classes. :)

llvm-svn: 272579

Patch by Jia Chen.

Differential Revision: http://reviews.llvm.org/D21233

llvm-svn: 272578

llvm-svn: 272577

The need for these intrinsics has been obviated by r272564 which
reimplements their functionality using generic IR.

llvm-svn: 272566

Patch by H.J. Lu.

llvm-svn: 272563

Summary:
Mesa and other users must set this to enable coalescing:
- STRIDE = 0
- SWIZZLE_ENABLE = 1

This makes one particular compute shader 8x faster.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, kzhuravl

Differential Revision: http://reviews.llvm.org/D21136

llvm-svn: 272556

In openFileForRead, attempt to fetch the actual name of the file on disk -- including case -- so that clang can later warn about non-portable #include and #import directives.

Differential Revision: http://reviews.llvm.org/D19842
Corresponding clang patch: http://reviews.llvm.org/D19843

Re-commit after addressing issues with of generating too many warnings for Windows and asan test failures

Patch by Eric Niebler

llvm-svn: 272555

The condition reg of the cndmask_b64 expansion can't be killed by
the first one, and the implicit super register implicit def is needed.

llvm-svn: 272554

This enables use of the 'R' and 'T' memory constraints for inline ASM
operands on SystemZ, which allow an index register as well as an
immediate displacement. This patch includes corresponding documentation
and test case updates.

As with the last patch of this kind, I moved the 'm' constraint to the
most general case, which is now 'T' (base + 20-bit signed displacement +
index register).

Author: colpell
Differential Revision: http://reviews.llvm.org/D21239

llvm-svn: 272547

to go in as soon as llvm patch has gone in because
tests will start breaking in Clang.

llvm-svn: 272546

Reviewers: ashutosh.nema

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21281

llvm-svn: 272545

MRRC/MRRC2 instruction writes to two registers. The
intrinsic definition returns a single uint64_t to
represent the write, this is a compact way of
representing a write to two 32 bit registers,
the alternative might have been two return a
struct of 2 uint32_t's but this isn't as nice.

Differential Revision: 

llvm-svn: 272544

constant in soft float mode on PowerPC 32 architecture.

llvm-svn: 272543

llvm-svn: 272542

Summary:
The "-Werror=enum-compare" shows that the statement is using two different enums:

enumeral mismatch in conditional expression: 'llvm::X86ISD::NodeType' vs 'llvm::ISD::NodeType'

A follow-up fix on D21235.

Reviewers: klimek

Subscribers: spatel, cfe-commits

Differential Revision: http://reviews.llvm.org/D21278

llvm-svn: 272539

RAS extensions are part of ARMv8.2,now supported in Clang.
Add RAS extensions support in AArch64TargetParser.

llvm-svn: 272533

[AVX512] Remove maksed pshufd, pshuflw, and phufhw intrinsics and autoupgrade them to selects and shufflevector.

llvm-svn: 272527

[X86] Refactor some of the X86 autoupgrade code to split mask vector and select generation into routines that can be reused for future intrinsic upgrades. NFC

llvm-svn: 272526

When visualizing small vectors in VS2015, show the first few elements in the DisplayString instead of the size. For example, a SmallVector of DeclAccessPair will visualize like

  {public typename ...Ts, public typename U}

The visualization in VS2013 remains the same because we continue to include the old visualizer with a lower-than-default priority of MediumLow, and the same SmallVector would continue to be visualized as

  {size = 2}

llvm-svn: 272525

llvm-svn: 272523

td_type is std::pair<std::string, std::string>, but the map returns
elements of std::pair<const std::string, std::string>. In well-designed
languages like C++ that yields an implicit copy perfectly hidden by
constref's lifetime extension. Just use auto, the typedef obscured the
real type anyways.

Found with a little help from clang-tidy's
performance-implicit-cast-in-loop.

llvm-svn: 272519

llvm-svn: 272517

No functionality change intended.

llvm-svn: 272516

This is second patch to clean up the code.

In this patch, the logic to determine block outlinining
is refactored and more comments are added.
 

llvm-svn: 272514

Or replace with llvm::function_ref if it's never stored. NFC intended.

llvm-svn: 272513

This used to be free, copying and moving DebugLocs became expensive
after the metadata rewrite. Passing by reference eliminates a ton of
track/untrack operations. No functionality change intended.

llvm-svn: 272512

This patch is intended to solve:
https://llvm.org/bugs/show_bug.cgi?id=28044

By changing the definition of X86ISD::CMPP to use float types, we allow it to be created 
and pass legalization for an SSE1-only target where v4i32 is not legal.

The motivational trail for this change includes:
https://llvm.org/bugs/show_bug.cgi?id=28001

and eventually makes this trigger:
http://reviews.llvm.org/D21190

Ie, after this step, we should be free to have Clang generate FP compare IR instead of x86
intrinsics for SSE C packed compare intrinsics. (We can auto-upgrade and remove the LLVM 
sse.cmp intrinsics as a follow-up step.) Once we're generating vector IR instead of x86
intrinsics, a big pile of generic optimizations can trigger.

Differential Revision: http://reviews.llvm.org/D21235

llvm-svn: 272511

llvm-svn: 272510

llvm-svn: 272509

A lot of the codegen is pretty awful for these as they are mostly implemented as generic bit twiddling ops 

llvm-svn: 272508

The approach taken here follows r267631.

deadarghaX0r should be easy to port when the time comes to add new-PM
support to bugpoint.

llvm-svn: 272507