- Jun 01, 2010
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Dan Gohman authored
llvm-svn: 105270
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Kalle Raiskila authored
llvm-svn: 105269
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- May 31, 2010
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Bill Wendling authored
llvm-svn: 105257
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Duncan Sands authored
the newly created allocas may be used by inlined calls, so these need to have their tail call flags cleared. Fixes PR7272. llvm-svn: 105255
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Eric Christopher authored
llvm-svn: 105253
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Chris Lattner authored
that are too large. This causes the freebsd bootloader to be too large apparently. It's unclear if this should be an -Os or -Oz thing. Thoughts welcome. llvm-svn: 105228
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Chris Lattner authored
llvm-svn: 105227
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Chris Lattner authored
llvm-svn: 105226
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Chris Lattner authored
llvm-svn: 105225
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Dan Gohman authored
EOF is detected. llvm-svn: 105223
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Benjamin Kramer authored
llvm-svn: 105220
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Nick Lewycky authored
first. Fixes PR7265. llvm-svn: 105206
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- May 30, 2010
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Oscar Fuentes authored
llvm-svn: 105168
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Alexis Hunt authored
The StmtNodes generator has been generalized to allow for the creation of DeclNodes tables as well, and another emitter was added for DeclContexts. llvm-svn: 105164
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- May 29, 2010
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Anton Korobeynikov authored
llvm-svn: 105109
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Anton Korobeynikov authored
llvm-svn: 105108
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Anton Korobeynikov authored
llvm-svn: 105107
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Anton Korobeynikov authored
llvm-svn: 105106
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Dan Gohman authored
llvm-svn: 105105
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Dan Gohman authored
shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set doesn't needs its EnableFastISel argument. llvm-svn: 105101
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Benjamin Kramer authored
llvm-svn: 105100
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Nick Lewycky authored
llvm-svn: 105098
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Nick Lewycky authored
llvm-svn: 105096
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Evan Cheng authored
llvm-svn: 105095
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Evan Cheng authored
Fix PR7193: if sibling call address can take a register, make sure there are enough registers available by counting inreg arguments. llvm-svn: 105092
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Jakob Stoklund Olesen authored
llvm-svn: 105066
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Jakob Stoklund Olesen authored
Also verify that all subregister indices compose unambiguously. llvm-svn: 105064
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Jakob Stoklund Olesen authored
were overspecified when inheriting sub-subregisters, for instance: R0Q:subreg_even32 = R0Q:subreg_32bit = R0Q:subreg_even:subreg_32bit. This meant that composeSubRegIndices(subreg_even, subreg_32bit) was ambiguous. llvm-svn: 105063
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Evan Cheng authored
llvm-svn: 105061
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Evan Cheng authored
Schedule high latency instructions for latency reduction even if they are not vfp / NEON instructions. llvm-svn: 105060
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Dale Johannesen authored
llvm-svn: 105059
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Bruno Cardoso Lopes authored
llvm-svn: 105014
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Dan Gohman authored
llvm-svn: 105012
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- May 28, 2010
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Dan Gohman authored
llvm-svn: 105009
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Dan Gohman authored
as is done with most other cast opcode predicates. llvm-svn: 105008
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Dan Gohman authored
llvm-svn: 105006
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Kevin Enderby authored
llvm-svn: 105005
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Kevin Enderby authored
llvm-svn: 105001
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Kevin Enderby authored
getX86RegNum() does not happen. Patch by Shantonu Sen! llvm-svn: 104994
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