it. NetBSD/ARM and TILE-Gx are examples for platforms that have an
unusable fenv.h and this avoids the need for a blacklist.

llvm-svn: 177865

The hook can be overriden in frontend to print to e.g. a file.

llvm-svn: 177864

llvm-svn: 177863

llvm-svn: 177862

[Sanitizer] Compile sanitizer runtimes with -Wno-non-virtual-dtor. Virtual dtors may be a problem for us, as sanitizer runtime should not generally assume libstdc++ presence.

llvm-svn: 177860

llvm-svn: 177859

llvm-svn: 177858

llvm-svn: 177857

This simplification happens at 2 places :
 - using the nsw attribute when the shl / mul is used by a sign test
 - when the shl / mul is compared for (in)equality to zero

llvm-svn: 177856

Changed isNullOrUndef => IsNullOrUndef and isNoopInstruction => IsNoopInstruction so that all helper functions are named similarly in ObjCARC.h.

llvm-svn: 177855

llvm-svn: 177854

Also now use -strict-whitespace as the tests are confusing otherwise.

llvm-svn: 177853

These will be re-added to clang/test.

llvm-svn: 177852

llvm-svn: 177851

[analyzer] Adds cplusplus.NewDelete checker that check for memory leaks, double free, and use-after-free problems of memory managed by new/delete.

llvm-svn: 177849

Make threats about removing the old syntax.

llvm-svn: 177848

llvm-svn: 177847

These aren't generated by default, but they are needed when either side of
the comparison is tainted.

Should fix our internal buildbot.

llvm-svn: 177846

The types of register variables no longer need to be specified in output
patterns.

llvm-svn: 177845

This syntax is now preferred:

  def : Pat<(subc i32:$b, i32:$c), (SUBCCrr $b, $c)>;

There is no reason to repeat the types in the output pattern.

llvm-svn: 177844

DAG arguments can optionally be named:

  (dag node, node:$name)

With this change, the node is also optional:

  (dag node, node:$name, $name)

The missing node is treated as an UnsetInit, so the above is equivalent
to:

  (dag node, node:$name, ?:$name)

This syntax is useful in output patterns where we currently require the
types of variables to be repeated:

  def : Pat<(subc i32:$b, i32:$c), (SUBCCrr i32:$b, i32:$c)>;

This is preferable:

  def : Pat<(subc i32:$b, i32:$c), (SUBCCrr $b, $c)>;

llvm-svn: 177843

llvm-svn: 177842

Contributed-by: Thomas Schwinge <thomas@codesourcery.com>
llvm-svn: 177841

llvm-svn: 177840

OpenCL 1.2 spec. 5.7.3.

llvm-svn: 177839

llvm-svn: 177838

llvm-svn: 177837

No functionality change.

llvm-svn: 177836

Also update the documentation since Sparc is the nicest backend, and
used as an example in WritingAnLLVMBackend.

llvm-svn: 177835

This makes it possible to define instruction patterns like this:

def LDri : F3_2<3, 0b000000,
                (outs IntRegs:$dst), (ins MEMri:$addr),
                "ld [$addr], $dst",
                [(set i32:$dst, (load ADDRri:$addr))]>;
                      ~~~

llvm-svn: 177834

In order for the new ZERO register to be used with MC, etc. we need to specify
its register number (0).

Thanks to Kai for reporting the problem!

llvm-svn: 177833

In preparation for using the new register scavenger capability for providing
more than one register simultaneously, specifically note functions that have
spilled VRSAVE (currently, this can happen only in functions that use the
setjmp intrinsic). As with CR spilling, such functions will need to provide two
emergency spill slots to the scavenger.

No functionality change intended.

llvm-svn: 177832

llvm-svn: 177831

I recently added a BCL instruction definition as part of implementing SjLj
support. This can also be used to MCize bcl emission in the asm printer.

No functionality change intended.

llvm-svn: 177830

The SelectionDAG graph has MVT type labels, not register classes, so
this makes it clearer what is happening.

This notation is also robust against adding more types to the IntRegs
register class.

llvm-svn: 177829

Just like register classes, value types can be used in two ways in
patterns:

  (sext_inreg i32:$src, i16)

In a named leaf node like i32:$src, the value type simply provides the
type of the node directly. This simplifies type inference a lot compared
to the current practice of specifiying types indirectly with register
classes.

As an unnamed leaf node, like i16 above, the value type represents
itself as an MVT::Other immediate.

llvm-svn: 177828

These spilling functions will eventually make use of the register scavenger,
however, they'll do so by taking advantage of PEI's virtual-register-based
delayed scavenging mechanism. As a result, these function parameters will not
be used, and can be removed.

No functionality change intended.

llvm-svn: 177827

Marshall Clow found some divide-by-zero warnings with UBSan in rand's binomial_distribution test.  This eliminates the divide-by-zeros and describes in comments the numerical difficulties the test is having.  Each of the problematic tests are exploring edge cases of the distribution.

llvm-svn: 177826

A register class can appear as a leaf TreePatternNode with and without a
name:

  (COPY_TO_REGCLASS GPR:$src, F8RC)

In a named leaf node like GPR:$src, the register class provides type
information for the named variable represented by the node. The TypeSet
for such a node is the set of value types that the register class can
represent.

In an unnamed leaf node like F8RC above, the register class represents
itself as a kind of immediate. Such a node has the type MVT::i32,
we'll never create a virtual register representing it.

This change makes it possible to remove the special handling of
COPY_TO_REGCLASS in CodeGenDAGPatterns.cpp.

llvm-svn: 177825

This is a start at making the libc++ test suite friendlier to the -fnoexceptions flag.  Although this is not a complete solution, it does reduce the number of test failures on OS X from 467 to 128 on OS X when -fno-exceptions is enabled, and does not impact the number of failures at all when -fno-exceptions is not enabled.  The bulk of this code was donated anonymously.

llvm-svn: 177824