Overflow doesn't affect the correctness of equalities. Computing this is cheap,
we just reuse the computation for the inbounds case and try to peel of more
non-inbounds GEPs. This pattern is unlikely to ever appear in code generated by
Clang, but SCEV occasionally produces it.

llvm-svn: 191200

Changes to MIPS SelectionDAG:
* Added nodes VEXTRACT_[SZ]EXT_ELT to represent extract and extend in a single
  operation and implemented the DAG combines necessary to fold sign/zero
  extends into the extract.

llvm-svn: 191199

llvm-svn: 191198

llvm-svn: 191197

llvm-svn: 191196

llvm-svn: 191195

llvm-svn: 191194

Partially revert r191192: Fix -Wunused-variable error when assertions are disabled and -Werror is in use.

An unrelated change crept in because 'svn revert' isn't recursive by default.
The unrelated changes have been reverted.

llvm-svn: 191193

llvm-svn: 191192

[mips][msa] Implemented build_vector using ldi, fill, and custom SelectionDAG nodes (VSPLAT and VSPLATD)

Note: There's a later patch on my branch that re-implements this to select
build_vector without the custom SelectionDAG nodes. The future patch avoids
the constant-folding problems stemming from the custom node (i.e. it doesn't
need to re-implement all the DAG combines related to BUILD_VECTOR).

Changes to MIPS specific SelectionDAG nodes:
* Added VSPLAT
    This is a special case of BUILD_VECTOR that covers the case the
    BUILD_VECTOR is a splat operation.
* Added VSPLATD
    This is a special case of VSPLAT that handles the cases when v2i64 is legal

llvm-svn: 191191

llvm-svn: 191190

llvm-svn: 191189

llvm-svn: 191188

llvm-svn: 191187

Summary:
We enable ASAN's use-after-return instrumentation at compile-time,
but still keep it disabled at run-time.
This enables the users to flip the flag at run-time using environment variable
ASAN_OPTIONS=detect_stack_use_after_return=1 instead of using a separate build.
If UAR detection is disabled at run-time, this extra compile-time instrumentation
costs very small slowdown. On SPEC 2006 14 tests are not affected at all,
4 tests get ~ 1% slowdown and 453.povray gets 4%.

Reviewers: samsonov

Reviewed By: samsonov

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1741

llvm-svn: 191186

llvm-svn: 191185

[asan] disable the detect_stack_use_after_return run-time flag by default and enable it explicitly in tests. This is done in preparation to enabling the -fsanitize=use-after-return compile-time flag by default when -fsanitize=address is present.

llvm-svn: 191184

This adds an option --output-filetype that can be set to either
YAML/Native(case insensitive). The linker would create the outputs
associated with the type specified by the user.

Changes all the tests to use the new option.

llvm-svn: 191183

InitListExpr for a C++11-style T{...} construction, if initialization
registered a destructor for it.

llvm-svn: 191182

Add missing index comments to the left side of the DAG ISel matcher table for each individual case of SwitchOpcode/Type.

llvm-svn: 191181

llvm-svn: 191180

llvm-svn: 191179

llvm-svn: 191178

llvm-svn: 191177

llvm-svn: 191176

This makes using array_pod_sort significantly safer. The implementation relies
on function pointer casting but that should be safe as we're dealing with void*
here.

llvm-svn: 191175

llvm-svn: 191174

No functionality change.

llvm-svn: 191173

llvm-svn: 191172

llvm-svn: 191171

takeAs<> instead of cast<>(.take()). Fix 80-column violation in whitespace after
comment.

llvm-svn: 191170

llvm-svn: 191169

[Sparc] Make SPARC instructions' encoding well defined such that TableGen can automatically generate code emitter.

llvm-svn: 191168

[Sparc] Clean up MOVcc instructions so that TableGen can encode them correctly. No functionality change intended.

llvm-svn: 191167

[Sparc] Clean up branch instructions, so that TableGen can encode branch conditions as well. No functionality change intended.

llvm-svn: 191166

Previously, the DAGISel function WalkChainUsers was spotting that it
had entered already-selected territory by whether a node was a
MachineNode (amongst other things). Since it's fairly common practice
to insert MachineNodes during ISelLowering, this was not the correct
check.

Looking around, it seems that other nodes get their NodeId set to -1
upon selection, so this makes sure the same thing happens to all
MachineNodes and uses that characteristic to determine whether we
should stop looking for a loop during selection.

This should fix PR15840.

llvm-svn: 191165

llvm-svn: 191164

Summary:
LLVM would crash when trying to come up with a relocation type for
assembly like:
movabsq $V@TPOFF, %rax

Instead, we say the relocation type is R_X86_64_TPOFF64.

Fixes PR17274.

Reviewers: dblaikie, nrieck, rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1717

llvm-svn: 191163

No functional change, just makes the error handling a bit more obvious.

llvm-svn: 191162

llvm-svn: 191161