- Dec 29, 2014
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Chandler Carruth authored
a CLANG_LIBDIR_SUFFIX variable. This is necessary before I can add support for using that variable to CMake and the C++ code in Clang, and the autoconf build system does all substitutions in the LLVM tree. As mentioned before, I'm not planning to add actual multilib support to the autoconf build, just enough stubs for it to keep playing nicely with the CMake build once that one has support. llvm-svn: 224922
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Chandler Carruth authored
For this to work, we have to encode it in the build variables and use it from llvm-config.cpp. I've tried to do this reasonably cleanly, but the code for llvm-config.cpp is pretty strange. However, with this, llvm-config stops giving the wrong answer when using LLVM_LIBDIR_SUFFIX. Note that the configure+make build just sets this to an empty string as that build system has zero support for multilib of any form. I'm not planning to add support there either, but this should leave a path for anyone that wanted to. llvm-svn: 224921
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Chandler Carruth authored
that is used by other projects to build against LLVM. This will allow subsequent patches to them to use LLVM_LIBDIR_SUFFIX, both when built as part of the larger LLVM build an as part of a standalone build against an installed set of LLVM libraries. llvm-svn: 224920
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Chandler Carruth authored
*numerous* places where it was missing in the CMake build. The primary change here is that the suffix is now actually used for all of the lib directories in the LLVM project's CMake. The various subprojects still need similar treatment. This is the first of a series of commits to try to make LLVM's cmake effective in a multilib Linux installation. I don't think many people are seriously using this variable so I'm hoping the fallout will be minimal. A somewhat unfortunate consequence of the nature of these commits is that until I land all of them, they will in part make the brokenness of our multilib support more apparant. At the end, things should actually work. llvm-svn: 224919
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Elena Demikhovsky authored
llvm-svn: 224917
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NAKAMURA Takumi authored
llvm-svn: 224907
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- Dec 28, 2014
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Keno Fischer authored
The else case ResultReg was not checked for validity. To my surprise, this case was not hit in any of the existing test cases. This includes a new test cases that tests this path. Also drop the `target triple` declaration from the original test as suggested by H.J. Lu, because apparently with it the test won't be run on Linux llvm-svn: 224901
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Michael Kuperstein authored
Adds missing memory instruction variants to AVX false dependency breaking handling. (SSE was handled in r224246) Differential Revision: http://reviews.llvm.org/D6780 llvm-svn: 224900
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Andrea Di Biagio authored
If the control flow is modelling an if-statement where the only instruction in the 'then' basic block (excluding the terminator) is a call to cttz/ctlz, CodeGenPrepare can try to speculate the cttz/ctlz call and simplify the control flow graph. Example: \code entry: %cmp = icmp eq i64 %val, 0 br i1 %cmp, label %end.bb, label %then.bb then.bb: %c = tail call i64 @llvm.cttz.i64(i64 %val, i1 true) br label %end.bb end.bb: %cond = phi i64 [ %c, %then.bb ], [ 64, %entry] \code In this example, basic block %then.bb is taken if value %val is not zero. Also, the phi node in %end.bb would propagate the size-of in bits of %val only if %val is equal to zero. With this patch, CodeGenPrepare will try to hoist the call to cttz from %then.bb into basic block %entry only if cttz is cheap to speculate for the target. Added two new hooks in TargetLowering.h to let targets customize the behavior (i.e. decide whether it is cheap or not to speculate calls to cttz/ctlz). The two new methods are 'isCheapToSpeculateCtlz' and 'isCheapToSpeculateCttz'. By default, both methods return 'false'. On X86, method 'isCheapToSpeculateCtlz' returns true only if the target has LZCNT. Method 'isCheapToSpeculateCttz' only returns true if the target has BMI. Differential Revision: http://reviews.llvm.org/D6728 llvm-svn: 224899
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Elena Demikhovsky authored
Masked vector intrinsics are a part of common LLVM IR, but they are really supported on AVX2 and AVX-512 targets. I added a code that translates masked intrinsic for all other targets. The masked vector intrinsic is converted to a chain of scalar operations inside conditional basic blocks. http://reviews.llvm.org/D6436 llvm-svn: 224897
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- Dec 27, 2014
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Craig Topper authored
[x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal immediates. Correctly this time. I did the wrong patterns the first time. llvm-svn: 224891
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David Majnemer authored
Determining the address of a TLS variable results in a function call in certain TLS models. This means that a simple ICmpInst might actually result in invalidating the CTR register. In such cases, do not attempt to rely on the CTR register for loop optimization purposes. This fixes PR22034. Differential Revision: http://reviews.llvm.org/D6786 llvm-svn: 224890
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Aaron Ballman authored
llvm-svn: 224889
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Aaron Ballman authored
Removing a variable that is set but never used, to silence a -Wunused-but-set-variable warning; NFC. llvm-svn: 224888
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Craig Topper authored
[x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal immediates. Forgot to do this when I did SSE/SSE2/AVX/AVX2. llvm-svn: 224887
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Craig Topper authored
[x86] Assert on invalid immediates in the instruction printer for cmp.ps/pd/ss/sd instead of truncating the immediate. The assembly parser and instruction selection shouldn't generate invalid immediates. llvm-svn: 224886
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Craig Topper authored
[x86] Prevent llvm.x86.cmp.ps/pd/ss/sd from being selected with bad immediates. The frontend now checks this when the builtin is used. This will allow the instruction printer to not have to deal with invalid immediates on these instructions. llvm-svn: 224885
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Keno Fischer authored
Summary: Consider the following IR: %3 = load i8* undef %4 = trunc i8 %3 to i1 %5 = call %jl_value_t.0* @foo(..., i1 %4, ...) ret %jl_value_t.0* %5 Bools (that are the result of direct truncs) are lowered as whatever the argument to the trunc was and a "and 1", causing the part of the MBB responsible for this argument to look something like this: %vreg8<def,tied1> = AND8ri %vreg7<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg8,%vreg7 Later, when the load is lowered, it will insert %vreg15<def> = MOV8rm %vreg14, 1, %noreg, 0, %noreg; mem:LD1[undef] GR8:%vreg15 GR64:%vreg14 but remember to (at the end of isel) replace vreg7 by vreg15. Now for the bug. In fast isel lowering, we mistakenly mark vreg8 as the result of the load instead of the trunc. This adds a fixup to have vreg8 replaced by whatever the result of the load is as well, so we end up with %vreg15<def,tied1> = AND8ri %vreg15<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg15 which is an SSA violation and causes problems later down the road. This fixes PR21557. Test Plan: Test test case from PR21557 is added to the test suite. Reviewers: ributzka Reviewed By: ributzka Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6245 llvm-svn: 224884
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- Dec 26, 2014
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Rafael Espindola authored
llvm-svn: 224872
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Colin LeMahieu authored
llvm-svn: 224871
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Colin LeMahieu authored
llvm-svn: 224870
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Colin LeMahieu authored
llvm-svn: 224869
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Colin LeMahieu authored
llvm-svn: 224868
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Colin LeMahieu authored
llvm-svn: 224867
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Colin LeMahieu authored
llvm-svn: 224866
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Rafael Espindola authored
llvm-svn: 224864
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Craig Topper authored
llvm-svn: 224862
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Craig Topper authored
[X86] Don't fail disassembly if REX.R/REX.B is used on an MMX register. Similar fix to not fail to disassembler CR9-CR15 references. llvm-svn: 224861
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Timur Iskhodzhanov authored
llvm-svn: 224860
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Rafael Espindola authored
llvm-svn: 224859
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David Majnemer authored
A multiply cannot unsigned wrap if there are bitwidth, or more, leading zero bits between the two operands. llvm-svn: 224849
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David Majnemer authored
Constant contains the isAllOnesValue and isNullValue predicates, not ConstantInt. llvm-svn: 224848
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David Majnemer authored
We already utilize this logic for reducing overflow intrinsics, it makes sense to reuse it for normal multiplies as well. llvm-svn: 224847
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Craig Topper authored
Teach disassembler to handle illegal immediates on (v)cmpps/pd/ss/sd instructions. Instead of rejecting we'll just generate the _alt forms that don't try to alter the mnemonic. While I'm here, merge some common code in the Instruction printers for the condition code replacement and fix the mask on SSE to be 3-bits instead of 4. llvm-svn: 224846
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Craig Topper authored
llvm-svn: 224845
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Hal Finkel authored
When materializing constant i1 values, they must be zero extended. We represent i1 values as [0, 1], not [0, -1], in i32 registers. As it turns out, this code path was dead for i1 values prior to r216006 (which is why this did not manifest in miscompiles until recently). Fixes -O0 self-hosting on PPC64/Linux. llvm-svn: 224842
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- Dec 25, 2014
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David Majnemer authored
No functionality change intended. llvm-svn: 224833
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Elena Demikhovsky authored
llvm-svn: 224832
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Elena Demikhovsky authored
No functional changes. The documentation is coming. llvm-svn: 224829
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David Majnemer authored
It's possible to have a prior definition of a symbol in module asm. Raise an error instead of crashing. llvm-svn: 224828
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