Commits · a77eae96bfc8348d11fc58c0aed098259c1905a3 · Roger Ferrer / llvm-epi · GitLab

Nov 14, 2018
- Make dsymutil more robust when parsing load commands. · a77eae96
  Adrian Prantl authored Nov 13, 2018
  a77eae96
- [InstCombine] fold funnel shift amount based on demanded bits · a1395648
  Sanjay Patel authored Nov 13, 2018
  a1395648
- Preserve loop metadata when splitting exit blocks · 3c87c2a3
  Craig Topper authored Nov 13, 2018
  3c87c2a3
Nov 13, 2018
- [InstCombine] canonicalize rotate patterns with cmp/select · f8f12272
  Sanjay Patel authored Nov 13, 2018
  f8f12272
- [AMDGPU] combine extractelement into several selects · bcb34ac2
  Stanislav Mekhanoshin authored Nov 13, 2018
  bcb34ac2
- [AsmPrinter] Fix DebugInfo/X86/gnu-public-names.ll after rL346790 · 807a8bae
  Fangrui Song authored Nov 13, 2018
  807a8bae
- Fixed DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT i1 handling · 35de877e
  Stanislav Mekhanoshin authored Nov 13, 2018
  35de877e
- [MS Demangler] Print public:, protected:, private: if set in FunctionClass or... · a92b4639
  Nico Weber authored Nov 13, 2018
  a92b4639
- [AsmPrinter] Rename a comment of .debug_gnu_pubnames entry · d8fd0ec0
  Fangrui Song authored Nov 13, 2018
  d8fd0ec0
- DebugInfo: Add a CU metadata attribute for use of DWARF ranges base address specifiers · bb279116
  David Blaikie authored Nov 13, 2018
  bb279116
- [llvm-objcopy] Rename --keep to --keep-section. · c5bae783
  Jordan Rupprecht authored Nov 13, 2018
  c5bae783
- [WebAssembly] Fix broken assumption that all bitcasts are to functions types · f98ba05f
  Sam Clegg authored Nov 13, 2018
  f98ba05f
- [IR] Add a dedicated FNeg IR Instruction · cbde0d9c
  Cameron McInally authored Nov 13, 2018
  cbde0d9c
- [WebAssembly] Mark immediates.ll as XFAILed on MIPS hosts · 9d87256d
  Simon Atanasyan authored Nov 13, 2018
  9d87256d
- [CSP, Cloning] Update DuplicateInstructionsInSplitBetween to use DomTreeUpdater. · 107d0a87
  Florian Hahn authored Nov 13, 2018
  107d0a87
- Revert "[ThinLTO] Internalize readonly globals" · fa43892d
  Steven Wu authored Nov 13, 2018
  fa43892d
- [InstCombine] add tests for funnel shift demanded bits; NFC · bcc5a742
  Sanjay Patel authored Nov 13, 2018
  bcc5a742
- [CostModel][X86] Fix constant vector XOP rights shifts · e827fe09
  Simon Pilgrim authored Nov 13, 2018
  e827fe09
- [CostModel][X86] Add more cost tests for funnel shifts · 2fe1076a
  Simon Pilgrim authored Nov 13, 2018
  2fe1076a
- Fix .cfi_restore with register numbers > 64 · dbfa6e61
  Alexander Richardson authored Nov 13, 2018
  dbfa6e61
- [SystemZ] Increase the number of VLREPs · f9b2b5e6
  Jonas Paulsson authored Nov 13, 2018
  f9b2b5e6
- [X86] Add more tests for -x86-experimental-vector-widening-legalization · 333ab7d0
  Craig Topper authored Nov 13, 2018
  333ab7d0
- [commit test] Add blank line to test/tools/llvm-objdump/full-contents.test · 65051c83
  Xing GUO authored Nov 13, 2018
  65051c83
- [libObject] Fix getDesc for Elf_Note_Impl · ee7ec6ce
  Jake Ehrlich authored Nov 13, 2018
  ee7ec6ce
- [FileCheck] introduce CHECK-COUNT-<num> repetition directive · 6c9e19b5
  Fedor Sergeev authored Nov 13, 2018
  6c9e19b5
- [InstCombine] add rotate variants that include select; NFC · 02f289e5
  Sanjay Patel authored Nov 12, 2018
  02f289e5
Nov 12, 2018
- [InstCombine] narrow width of rotate patterns, part 3 · 35b1c2d1
  Sanjay Patel authored Nov 12, 2018
  35b1c2d1
- [InstCombine] narrow width of rotate patterns, part 2 (PR39624) · 98e427cc
  Sanjay Patel authored Nov 12, 2018
  98e427cc
- [X86][SSE] Add lowerVectorShuffleAsByteRotateAndPermute (PR39387) · e565e5a9
  Simon Pilgrim authored Nov 12, 2018
  e565e5a9
- AMDGPU: Adding more median3 patterns · a992c694
  Aakanksha Patil authored Nov 12, 2018
  a992c694
- [InstCombine] add more tests for rotate narrowing; NFC · b32d03df
  Sanjay Patel authored Nov 12, 2018
  b32d03df
- [WebAssembly] Added WasmAsmParser. · cc75e77d
  Wouter van Oortmerssen authored Nov 12, 2018
  cc75e77d
- [X86] In LowerMULH, use generic truncate and vector shuffle nodes instead of... · c48712b3
  Craig Topper authored Nov 12, 2018
  c48712b3
- [AMDGPU] Optimize S_CBRANCH_VCC[N]Z -> S_CBRANCH_EXEC[N]Z · e86c8d33
  Stanislav Mekhanoshin authored Nov 12, 2018
  e86c8d33
- [InstCombine] regenerate checks; NFC · 8512e590
  Sanjay Patel authored Nov 12, 2018
  8512e590
- [CostModel][X86] Add funnel shift rotation special case costs · 93c64e5c
  Simon Pilgrim authored Nov 12, 2018
  93c64e5c
- Fix MachineInstr::findRegisterUseOperandIdx subreg checks · 5f951314
  Stanislav Mekhanoshin authored Nov 12, 2018
  5f951314
- [llvm-readelf] Make llvm-readelf more compatible with GNU readelf. · dbf552c4
  Jordan Rupprecht authored Nov 12, 2018
  dbf552c4
- [CostModel][X86] Add SHLD/SHRD scalar funnel shift costs · 49e93d2f
  Simon Pilgrim authored Nov 12, 2018
  49e93d2f
- [DWARFv5] Emit split type units in .debug_info.dwo. · 5b302bfc
  Paul Robinson authored Nov 12, 2018
  5b302bfc