llvm-svn: 183769

No functionality changes.

llvm-svn: 183767

llvm-svn: 183765

llvm-svn: 183764

llvm-svn: 183763

llvm-svn: 183761

No functionality change.

llvm-svn: 183759

No functionality change.

llvm-svn: 183758

Instead of a custom implementation of replaceAllUsesWith, we just call
replaceAllUsesWith and recreate llvm.used and llvm.compiler-used.

This change is particularity interesting because it makes llvm see
through what clang is doing with static used functions in extern "C"
contexts. With this change, running clang -O2 in

extern "C" {
  __attribute__((used)) static void foo() {}
}

produces

@llvm.used = appending global [1 x i8*] [i8* bitcast (void ()* @foo to
i8*)], section "llvm.metadata"
define internal void @foo() #0 {
entry:
  ret void
}

llvm-svn: 183756

No functionality change.

llvm-svn: 183754

It will be tested in the next commit which moves another user to identify_magic.

Original message:

Fix an out of bounds array access.

We were looking at Magic[5] without checking Length. Since this path would not
return unless Length >= 18 anyway, just move the >= 18 check up.

llvm-svn: 183753

llvm-svn: 183752

This enables the compiler to see the enum and produce warnings about a switch
not being fully covered. Fix one of these warnings.

llvm-svn: 183749

No functionality change.

llvm-svn: 183747

No functionality change.

llvm-svn: 183746

No functionality change.

llvm-svn: 183745

llvm-svn: 183744

The effect of llvm.used is to introduce an invisible reference, so this seems
a reasonable restriction. It will be used to provide an easy ordering of
the entries in llvm.used.

llvm-svn: 183743

FIXME: Introduce yet another checker but assert(0).
llvm-svn: 183736

Negative zero is returned by the primary expression parser as INT32_MIN, so all that the method needs to do is to accept this value.
Behavior already present for Thumb2.

llvm-svn: 183734

This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.

llvm-svn: 183733

llvm-svn: 183731

The decoded MCInst wasn't reencoded as the same instruction

llvm-svn: 183729

  - Don't use assert(0), or tests may pass or fail according to assertions.
  - For now, The tests are marked as XFAIL for win32 hosts.

FIXME: Could we avoid XFAIL to specify triple in the RUN lines?
llvm-svn: 183728

FYI, isOSBinFormatCOFF() is as same as isOSWindows(), on trunk.

llvm-svn: 183727

llvm-svn: 183726

Should bring bots back to life.

llvm-svn: 183715

Apparently these macros have semicolons inside of them already.

llvm-svn: 183712

Currently, only emitting the ELF header is supported (no sections or
segments).

The ELFYAML code organization is broadly similar to the COFFYAML code.

llvm-svn: 183711

Some ARM CPUs only support ARM mode (ancient v4 ones, for example) and some
only support Thumb mode (M-class ones currently). This makes sure such CPUs
default to the correct mode and makes the AsmParser diagnose an attempt to
switch modes incorrectly.

rdar://14024354

llvm-svn: 183710

functionality change.

llvm-svn: 183709

to return and this is done all over.

llvm-svn: 183704

llvm-svn: 183703

llvm-svn: 183698

llvm-svn: 183695

Previously LEA64_32r went through virtually the entire backend thinking it was
using 32-bit registers until its blissful illusions were cruelly snatched away
by MCInstLower and 64-bit equivalents were substituted at the last minute.

This patch makes it behave normally, and take 64-bit registers as sources all
the way through. Previous uses (for 32-bit arithmetic) are accommodated via
SUBREG_TO_REG instructions which make the types and classes agree properly.

llvm-svn: 183693

llvm-svn: 183692

llvm-svn: 183690

[PowerPC] Support extended sc mnemonic

A plain "sc" without argument is supposed to be treated like "sc 0"
by the assembler.  This patch adds a corresponding alias.

Problem reported by Joerg Sonnenberger.

llvm-svn: 183687

[PowerPC] Support branch mnemonics with implied CR0

The extended branch mnemonics are supposed to use an implied CR0
if there is no explicit condition register specified.  This patch
adds extra variants of the mnemonics to this effect.

Problem reported by Joerg Sonnenberger.

llvm-svn: 183686