Commits · b8ff4a4a700d3d24e20e98a1e849fd57c8b0bbd0 · Roger Ferrer / llvm-epi · GitLab

Mar 27, 2017
- [LV] Transform truncations of non-primary induction variables · b8ff4a4a
  Matthew Simpson authored Mar 27, 2017
  b8ff4a4a
- [GlobalISel][AArch64] Fold FI into LDR/STR ui addressing mode. · f75782f9
  Ahmed Bougacha authored Mar 27, 2017
  f75782f9
- [GlobalISel][AArch64] Fold G_GEP into LDR/STR ui addressing mode. · 8a654085
  Ahmed Bougacha authored Mar 27, 2017
  8a654085
- [GlobalISel][AArch64] Select store of zero to WZR/XZR. · 85a66a6d
  Ahmed Bougacha authored Mar 27, 2017
  85a66a6d
- [GlobalISel][AArch64] Select CBZ. · 641cb203
  Ahmed Bougacha authored Mar 27, 2017
  641cb203
- [GlobalISel][AArch64] Use proper constant types in test. NFC. · c1cbcee1
  Ahmed Bougacha authored Mar 27, 2017
  c1cbcee1
- [AMDGPU][MC] Fix for Bug 28207 + LIT tests · c512d448
  Dmitry Preobrazhensky authored Mar 27, 2017
  c512d448
- [AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as not having side effects. · 862a4127
  Chad Rosier authored Mar 27, 2017
  862a4127
- [InstCombine] Avoid incorrect folding of select into phi nodes when incoming... · f57ae333
  Anna Thomas authored Mar 27, 2017
  f57ae333
- [X86][AVX2] bugzilla bug 21281 Performance regression in vector interleave in AVX2 · 89d5f939
  Gadi Haber authored Mar 27, 2017
  89d5f939
Mar 26, 2017
- [LoopUnroll] Remap references in peeled iteration · b71bb80c
  Serge Pavlov authored Mar 26, 2017
  b71bb80c
- [X86][SSE] Add computeKnownBitsForTargetNode support for (V)PSLL/(V)PSRL instructions · 92925ea7
  Simon Pilgrim authored Mar 26, 2017
  92925ea7
- [X86][AVX512F] Fix reg class for VMOVSSZrr/VMOVSSZrrk and VMOVSDZrr/VMOVSDZrrk · 049d9c92
  Simon Pilgrim authored Mar 26, 2017
  049d9c92
- Regenerate test · 544f750d
  Simon Pilgrim authored Mar 26, 2017
  544f750d
- Regenerate test · a2b81dc4
  Simon Pilgrim authored Mar 26, 2017
  a2b81dc4
- Regenerate tests to remove duplicated checks · 1d8235a0
  Simon Pilgrim authored Mar 26, 2017
  1d8235a0
- [GlobalISel][X86] support G_FRAME_INDEX instruction selection. · 531a203a
  Igor Breger authored Mar 26, 2017
  531a203a
- Split the SimplifyCFG pass into two variants. · fa736742
  Joerg Sonnenberger authored Mar 26, 2017
  fa736742
- [IR] Make SwitchInst::CaseIt almost a normal iterator. · 0d256c0f
  Chandler Carruth authored Mar 26, 2017
  0d256c0f
Mar 25, 2017
- [X86][SSE] Combine (VSRLI (VSRAI X, Y), (NumSignBits-1)) -> (VSRLI X, (NumSignBits-1)) · c0720a40
  Simon Pilgrim authored Mar 25, 2017
  c0720a40
- Change the default attributes for llvm.prefetch to inaccessiblemem_or_argmemonly · 0935875c
  Eric Christopher authored Mar 25, 2017
  0935875c
- [X86][SSE] Added ComputeNumSignBitsForTargetNode support for (V)PSRAI · 6397963c
  Simon Pilgrim authored Mar 25, 2017
  6397963c
- [x86] use PMOVMSK to replace memcmp libcalls for 16-byte equality · 9ebb6884
  Sanjay Patel authored Mar 25, 2017
  9ebb6884
- [X86][SSE] Add extra computeNumSignBits test case for D31311. · c3e5c3c5
  Simon Pilgrim authored Mar 25, 2017
  c3e5c3c5
- [AMDGPU] Switch data layout by triple environment amdgiz · 14834c3e
  Yaxun Liu authored Mar 25, 2017
  14834c3e
- [asan] Put ctor/dtor in comdat. · 71bb8f1a
  Evgeniy Stepanov authored Mar 25, 2017
  71bb8f1a
- [ARM] Fix mixup between Lo and Hi in SMLALBB formation. · 95ddd187
  Eli Friedman authored Mar 25, 2017
  95ddd187
- [codeview] Don't assert when the user violates the ODR · 6b78e163
  Reid Kleckner authored Mar 24, 2017
  6b78e163
Mar 24, 2017
- [x86] add 32-bit RUN for better memcmp coverage; NFC · 650599d8
  Sanjay Patel authored Mar 24, 2017
  650599d8
- AMDGPU: Fix annotating loops with nested loop conditions · 0607a442
  Matt Arsenault authored Mar 24, 2017
  0607a442
- Revert r298620: [LV] Vectorize GEPs · c2124e18
  Ivan Krasin authored Mar 24, 2017
  c2124e18
- [asan] Delay creation of asan ctor. · 64e872a9
  Evgeniy Stepanov authored Mar 24, 2017
  64e872a9
- AMDGPU: Implement f16 fround · b5d23271
  Matt Arsenault authored Mar 24, 2017
  b5d23271
- AMDGPU: Unify divergent function exits. · b8f8dbc2
  Matt Arsenault authored Mar 24, 2017
  b8f8dbc2
- Make testcase less nonsensical while still exercising the same code paths. · 4994bc04
  Adrian Prantl authored Mar 24, 2017
  4994bc04
- AMDGPU: Fold rcp/rsq of undef to undef · 4c7795dd
  Matt Arsenault authored Mar 24, 2017
  4c7795dd
- [AMDGPU] Fold V_CNDMASK with identical source operands · 70603dce
  Stanislav Mekhanoshin authored Mar 24, 2017
  70603dce
- [AMDGPU] Rename Kind to ValueKind in metadata to be consistent · 4986d9fb
  Konstantin Zhuravlyov authored Mar 24, 2017
  4986d9fb
- [AMDGPU] Add AMDGPUAliasAnalysis to opt pipeline · a27b2cac
  Stanislav Mekhanoshin authored Mar 24, 2017
  a27b2cac
- [ThinLTO] Correct counting of functions in inliner stats · 428b9e06
  Teresa Johnson authored Mar 24, 2017
  428b9e06