Commits · bdf51784678c9027f7e24dd66d3fcdca29dd2724 · Roger Ferrer / llvm-epi · GitLab

Jan 11, 2014
- Fix broken CHECK lines. · c10563d1
  Benjamin Kramer authored Jan 11, 2014
  c10563d1
Dec 20, 2013
- R600: Allow ftrunc · eddfa694
  Tom Stellard authored Dec 20, 2013
  eddfa694
Dec 19, 2013
- Add REQUIRES:asserts to 3 tests in llvm/test/CodeGen/R600 added in r192212. · 6164aa59
  NAKAMURA Takumi authored Dec 19, 2013
  6164aa59
- R600/SI: Make private pointers be 32-bit. · a98cd6a5
  Matt Arsenault authored Dec 19, 2013
  a98cd6a5
Dec 14, 2013
- R600/SI: Minor improvements to test. · e0628c4b
  Matt Arsenault authored Dec 14, 2013
  e0628c4b
Dec 10, 2013
- R600/SI: Add i64 cmp tests · 29da7178
  Matt Arsenault authored Dec 10, 2013
  29da7178
- R600: Fix an infinite loop when trying to reorganize export/tex vector input · cc0ea74c
  Vincent Lejeune authored Dec 10, 2013
  cc0ea74c
- R600: Fix input modifiers lost for Cayman · f92d64d1
  Vincent Lejeune authored Dec 10, 2013
  f92d64d1
Dec 07, 2013
- Add a RequireStructuredCFG Field to TargetMachine. · 92b0a649
  Vincent Lejeune authored Dec 07, 2013
  92b0a649
Dec 05, 2013
- R600/SI: Add comments for number of used registers. · 89cc49fe
  Matt Arsenault authored Dec 05, 2013
  89cc49fe
Dec 02, 2013
- R600: Workaround for cayman loop bug · 4b8d9e30
  Vincent Lejeune authored Dec 02, 2013
  4b8d9e30
Nov 27, 2013
- R600: Expand vector FABS · 175e7a8c
  Tom Stellard authored Nov 27, 2013
  175e7a8c
- R600/SI: Implement spilling of SGPRs v5 · c149dc02
  Tom Stellard authored Nov 27, 2013
  c149dc02
- R600/SI: Use SGPR_32 register class for 32-bit SMRD outputs · 859199da
  Tom Stellard authored Nov 27, 2013
  859199da
- R600: Add support for ISD::FROUND · 4d566b2e
  Tom Stellard authored Nov 27, 2013
  4d566b2e
Nov 23, 2013
- R600/SI: Fixing handling of condition codes · c0845334
  Tom Stellard authored Nov 22, 2013
  c0845334
Nov 22, 2013
- SelectionDAG: Optimize expansion of vec_type = BITCAST scalar_type · 06c67bcb
  Tom Stellard authored Nov 22, 2013
  06c67bcb
Nov 18, 2013
- R600/SI: Fix moveToVALU when the first operand is VSrc. · 3a4d86a1
  Matt Arsenault authored Nov 18, 2013
  3a4d86a1
- R600/SI: Fix multiple SGPR reads when using VCC. · 08f7e37a
  Matt Arsenault authored Nov 18, 2013
  08f7e37a
- R600/SI: Implement add i64, but do not yet enable. · fb826fa6
  Matt Arsenault authored Nov 18, 2013
  fb826fa6
- R600/SI: Move patterns to match add / sub to scalar instructions · 43b8e4ed
  Matt Arsenault authored Nov 18, 2013
  43b8e4ed
- R600: Enable the IR structurizer by default · 66df8a2c
  Tom Stellard authored Nov 18, 2013
  66df8a2c
- R600: Fix a crash in the AMDILCFGStrucurizer · 827ec9b6
  Tom Stellard authored Nov 18, 2013
  827ec9b6
- R600/SI: Fix illegal VGPR->SGPR copy inside of loop · f340787d
  Tom Stellard authored Nov 18, 2013
  f340787d
- R600/SI: Fix another case of illegal VGPR->SGPR copy · 13de5456
  Tom Stellard authored Nov 18, 2013
  13de5456
Nov 17, 2013
- Use right address space pointer size · 36f5eb59
  Matt Arsenault authored Nov 17, 2013
  36f5eb59
Nov 16, 2013
- Fix assert on unaligned access to global with different address space size. · dfb3e709
  Matt Arsenault authored Nov 16, 2013
  dfb3e709
- Fix codegen for null different sized pointer. · 19231e63
  Matt Arsenault authored Nov 16, 2013
  19231e63
- R600: Make dot_4 instructions predicable · 745d4298
  Vincent Lejeune authored Nov 16, 2013
  745d4298
Nov 15, 2013
- R600/SI: Add VReg_96 register class to SIRegisterInfo::hasVGPRs() · 519ae39c
  Tom Stellard authored Nov 15, 2013
  519ae39c
- Add target hook to prevent folding some bitcasted loads. · c5559bb1
  Matt Arsenault authored Nov 15, 2013
  c5559bb1
- R600: Fix scheduling of instructions that use the LDS output queue · 8f9fc207
  Tom Stellard authored Nov 15, 2013
  8f9fc207
Nov 14, 2013
- R600/SI: Add testcase for problem I ran into · bc637708
  Matt Arsenault authored Nov 14, 2013
  bc637708
- R600/SI: Add support for private address space load/store · 81d871de
  Tom Stellard authored Nov 13, 2013
  81d871de
- R600/SI: Prefer SALU instructions for bit shift operations · 8216602a
  Tom Stellard authored Nov 13, 2013
  8216602a
Nov 13, 2013
- R600: Fix selection failure on EXTLOAD · 00a0d6f6
  Matt Arsenault authored Nov 13, 2013
  00a0d6f6
Nov 12, 2013
- R600/SI: Change formatting of printed registers. · 72b31eee
  Matt Arsenault authored Nov 12, 2013
  72b31eee
- R600/SI: Add test that fails due to requiring i64 mul for pointers · dbf9f311
  Matt Arsenault authored Nov 11, 2013
  dbf9f311
Nov 11, 2013
- R600: Use function inputs to represent data stored in gpr · f143af3f
  Vincent Lejeune authored Nov 11, 2013
  f143af3f
Nov 06, 2013
- R600: Fix LowerUDIVREM · 4f3751f2
  Vincent Lejeune authored Nov 06, 2013
  4f3751f2