llvm-svn: 161880

[asan] insert crash basic blocks inline as opposed to inserting them at the end of the function. This doesn't seem to fix or break anything, but is considered to be more friendly to downstream passes (test change)

llvm-svn: 161871

[asan] insert crash basic blocks inline as opposed to inserting them at the end of the function. This doesn't seem to fix or break anything, but is considered to be more friendly to downstream passes

llvm-svn: 161870

llvm-svn: 161860

Re-factor intrinsic lowering to combine common parts of similar intrinsics. Reduces compiled code size a little bit.

llvm-svn: 161859

Change greater than to greater than or equal so that an identical sized store to the same offset is treated as completing overwriting.

llvm-svn: 161857

llvm-svn: 161853

and allow some optimizations to turn conditional branches into unconditional.
This commit adds a simple control-flow optimization which merges two consecutive
basic blocks which are connected by a single edge. This allows the codegen to
operate on larger basic blocks.

rdar://11973998

llvm-svn: 161852

llvm-svn: 161851

returns 32. This change mirrors the corresponding code in
SmallDenseMap::shrink_and_clear().

llvm-svn: 161829

llvm-svn: 161826

llvm-svn: 161825

Add a roundToIntegral method to APFloat, which can be parameterized over various rounding modes.  Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC.

llvm-svn: 161807

llvm-svn: 161805

llvm-svn: 161804

LICM uses AliasSet information to hoist and sink instructions. However, other passes, such as LoopRotate
may invalidate its AliasSet because SSAUpdater does not update the AliasSet properly.
This patch teaches SSAUpdater to notify AliasSet that it made changes.
The testcase in PR12901 is too big to be useful and I could not reduce it to a normal size. 

rdar://11872059 PR12901

llvm-svn: 161803

Currently, if GetLocation reports that it did not find a valid pointer (this is the case for volatile load/stores),
we ignore the result. This patch adds code to handle the cases where we did not obtain a valid pointer.

rdar://11872864  PR12899

llvm-svn: 161802

These tests weren't actually being run before (missing ':' after CHECK).

llvm-svn: 161800

It never does anything when running 'make check', and it get's in the
way of updating live intervals in 2-addr.

The hook was originally added to help form IT blocks in Thumb2 code
before register allocation, but the pass ordering has changed since
then, and we run if-conversion after register allocation now.

When the MI scheduler is enabled, there will be no less than two
schedulers between 2-addr and Thumb2ITBlockPass, so this hook is
unlikely to help anything.

llvm-svn: 161794

llvm-svn: 161792

This change is to be enabled in clang.

rdar://9877866

llvm-svn: 161789

llvm-svn: 161788

llvm-svn: 161783

llvm-svn: 161782

It is still possible to if-convert if the tail block has extra
predecessors, but the tail phis must be rewritten instead of being
removed.

llvm-svn: 161781

This was causing unnecessary spills/restores of callee saved registers.

Fixes PR13572.

Patch by Pranav Bhandarkar!

llvm-svn: 161778

llvm-svn: 161777

Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ISDNode has more than one user. 

rdar://11876519

llvm-svn: 161775

OpTbl1 to OpTbl2 since they have 3 operands and the last operand can be changed
to a memory operand.

PR13576

llvm-svn: 161769

Patch by Weiming Zhao.

llvm-svn: 161768

Nehalem, Westmere and Sandy Bridge. AMD also has processor family 6.

llvm-svn: 161763

llvm-svn: 161758

[asan] remove the code for --asan-merge-callbacks as it appears to be a bad idea. (partly related to Bug 13225)

llvm-svn: 161757

llvm-svn: 161751

llvm-svn: 161750

Previously, we used VLD1.32 in all cases, however there are both 16 and 64-bit
accesses being selected, so we need to use an appropriate width load in those
cases.

llvm-svn: 161748

Tidy up VSETCC lowering code a bit more by adding an llvm_unreachable and putting an a couple if conditions in a better order.

llvm-svn: 161746

llvm-svn: 161745

llvm-svn: 161743

Remove the LowerMMXCONCAT_VECTORS function. It could never execute because there are no legal 64-bit vector types that could be used as inputs to a 128-bit concat_vectors. Remove a target specific SDNode and its patterns that become unused as a result.

llvm-svn: 161742