Summary: See PR38731.

Reviewers: andreadb

Subscribers: mgorny, javed.absar, tschuett, gbedwell, andreadb, RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D55557

llvm-svn: 349332

llvm-svn: 349331

The CC is operand 2 not operand 3.

llvm-svn: 349330

Appended options -ppc-vsr-nums-as-vr and -ppc-asm-full-reg-names to get the 
more descriptive output. Also removed useless function attributes.

llvm-svn: 349329

With some patch adopted for Power9 vabsd* insns, some CHECKs can't get the expected results.
But it's false alarm, we should update the case more robust.

llvm-svn: 349325

Needed for check-lld.

Differential Revision: https://reviews.llvm.org/D55750

llvm-svn: 349324

Fixes PR39874.

llvm-svn: 349323

llvm-svn: 349322

Also drop unnecessary entry blocks and avoid use of anonymous
variables.

llvm-svn: 349321

We had 3 different approaches - consistently use getTargetConstantBitsFromNode and allow undef elts.

llvm-svn: 349319

Tests checking for the addition of !range metadata should be
preserved if cttz/ctlz + icmp is optimized.

llvm-svn: 349318

llvm-svn: 349317

I'd like to try to move a lot of the flag matching out of EmitTest and push it to isel or isel preprocessing. This is a step towards that.

The test-shrink-bug.ll changie is an improvement because we are no longer interfering with test shrink handling in isel.

The pr34137.ll change is a regression, but the IR came from -O0 and was not reduced by InstCombine. So it contains a lot of redundancies like duplicate loads that made it combine poorly.

llvm-svn: 349315

llvm-svn: 349314

This reverts commit r349311.

Didn't check this carefully enough...

llvm-svn: 349312

llvm-svn: 349311

Test cases other than icmp with the bitwidth.

llvm-svn: 349310

These test comparisons with saturating add/sub in non-canonical
form.

llvm-svn: 349309

llvm-svn: 349307

llvm-svn: 349306

This is part of fixing PR39859:
https://bugs.llvm.org/show_bug.cgi?id=39859

We have a crippled vector ISA, so we have to invert a typical fold and create min/max here.

As discussed in the bug report, we can probably do better by using saturating subtract when 
it's available, but we should have this improvement for the min/max patterns regardless.

Alive proofs:
https://rise4fun.com/Alive/zsf
https://rise4fun.com/Alive/Qrl

Differential Revision: https://reviews.llvm.org/D55515

llvm-svn: 349304

The transform performs a bitwise logic op in a wider type followed by
truncate when both inputs are truncated from the same source type:
logic_op (truncate x), (truncate y) --> truncate (logic_op x, y)

There are a bunch of other checks that should prevent doing this when 
it might be harmful.

We already do this transform for scalars in this spot. The vector 
limitation was shared with a check for the case when the operands are 
extended. I'm not sure if that limit is needed either, but that would 
be a separate patch.

Differential Revision: https://reviews.llvm.org/D55448

llvm-svn: 349303

llvm-svn: 349302

Unknown target name: "bootstrap".

llvm-svn: 349301

llvm-svn: 349299

Also exposes an issue in DAGCombiner::visitFunnelShift where we were assuming the shift amount had the result type (after legalization it'll have the targets shift amount type).

llvm-svn: 349298

llvm-svn: 349297

llvm-svn: 349291

The two executables are needed by check-lld.

Differential Revision: https://reviews.llvm.org/D55687

llvm-svn: 349290

These executables are needed by check-lld.

Differential Revision: https://reviews.llvm.org/D55688

llvm-svn: 349289

llvm-svn: 349287

In preparation for converting to funnel shifts.

llvm-svn: 349286

Use consistent rules for when to lower to SHLD/SHRD for slow machines - fixes a weird issue where funnel shift gets expanded but then X86ISelLowering's combineOr sees the optsize and combines to SHLD/SHRD, but now with the modulo amount guard......

llvm-svn: 349285

llvm-svn: 349284

Use linker script magic to get data/cnts/name start/end.

llvm-svn: 349277

The NetBSD x86_64 kernel uses the 0xdfff900000000000 shadow
offset.

llvm-svn: 349276

Summary:
Make machine PHIs optimization to work for single value register taken from
several different copies. This is the first step to fix PR38917. This change
allows to get rid of redundant PHIs (see opt_phis2.mir test) to make
the subsequent optimizations (like CSE) possible and simpler.

For instance, before this patch the code like this:

%b = COPY %z
...
%a = PHI %bb1, %a; %bb2, %b
could be optimized to:

%a = %b
but the code like this:

%c = COPY %z
...
%b = COPY %z
...
%a = PHI %bb1, %a; %bb2, %b; %bb3, %c
would remain unchanged.
With this patch the latter case will be optimized:

%a = %z```.

Committed on behalf of: Anton Afanasyev anton.a.afanasyev@gmail.com

Reviewers: RKSimon, MatzeB

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54839

llvm-svn: 349271

llvm-svn: 349270

llvm-svn: 349265

Differential Revision: https://reviews.llvm.org/D55600

llvm-svn: 349264