Commits · cfea1606815663700040c8d1a3fe3811687321ce · Roger Ferrer / llvm-epi · GitLab

Aug 06, 2014
- Fix typos in comments and doc · ac8b66b3
  JF Bastien authored Aug 05, 2014
  ac8b66b3
- DebugInfo: Move the reference to the CU from the location list entry to the... · e1a26a62
  David Blaikie authored Aug 05, 2014
  e1a26a62
- Remove a virtual function from TargetMachine. NFC. · b8141d55
  Rafael Espindola authored Aug 05, 2014
  b8141d55
Aug 05, 2014
- Re-apply r214881: Fix return sequence on armv4 thumb · ef84bda5
  Jon Roelofs authored Aug 05, 2014
  ef84bda5
- [PowerPC] Swap arguments and adjust shift count for vsldoi on little endian · 42a6936c
  Bill Schmidt authored Aug 05, 2014
  42a6936c
- Don't internalize all but main by default. · f9e52cf0
  Rafael Espindola authored Aug 05, 2014
  f9e52cf0
- [x86] Fix a crasher due to shuffles which cancel each other out and add · a746239b
  Chandler Carruth authored Aug 05, 2014
  a746239b
- Remove dead code in condition · 6a6e9cb5
  Duncan P. N. Exon Smith authored Aug 05, 2014
  6a6e9cb5
- X86CodeEmitter.cpp: Add SEH_Epilogue to ignored list for legacy JIT, corresponding to r214775. · ca562297
  NAKAMURA Takumi authored Aug 05, 2014
  ca562297
- [X86] Improve comments for r214888 · c04f3f9f
  Adam Nemet authored Aug 05, 2014
  c04f3f9f
- R600/SI: Use register class instead of list of registers · 6532520f
  Matt Arsenault authored Aug 05, 2014
  6532520f
- R600/SI: Add exec_lo and exec_hi subregisters. · 2549bb4b
  Matt Arsenault authored Aug 05, 2014
  2549bb4b
- BitcodeReader: Fix non-determinism in use-list order · 5a511b59
  Duncan P. N. Exon Smith authored Aug 05, 2014
  5a511b59
- Remove dead zero store to calloc initialized memory · 00c9b646
  Philip Reames authored Aug 05, 2014
  00c9b646
- Revert r214881 because it broke lots of build-bots · 064eb5a1
  Jon Roelofs authored Aug 05, 2014
  064eb5a1
- Optimize vector fabs of bitcasted constant integer values. · 8e5beb6e
  Sanjay Patel authored Aug 05, 2014
  8e5beb6e
- [AVX512] Add masking variant and intrinsics for valignd/q · fd2161b7
  Adam Nemet authored Aug 05, 2014
  fd2161b7
- [X86] Increase X86_MAX_OPERANDS from 5 to 6 · 4688a2e5
  Adam Nemet authored Aug 05, 2014
  4688a2e5
- [X86] Add lowering to VALIGN · 164b07fb
  Adam Nemet authored Aug 05, 2014
  164b07fb
- [X86] Separate DAG node for valign and palignr · 2f10cc69
  Adam Nemet authored Aug 05, 2014
  2f10cc69
- [AVX512] alignr: Use suffix rather than name argument to multiclass · d00a05e3
  Adam Nemet authored Aug 05, 2014
  d00a05e3
- [AVX512] Pull everything alignr-related into the multiclass · f92139dd
  Adam Nemet authored Aug 05, 2014
  f92139dd
- Wrap long lines · 1c752d8f
  Adam Nemet authored Aug 05, 2014
  1c752d8f
- Fix return sequence on armv4 thumb · f5fad376
  Jon Roelofs authored Aug 05, 2014
  f5fad376
- Partially revert r214761 that asserted that all concrete debug info variables... · b706b58e
  David Blaikie authored Aug 05, 2014
  b706b58e
- Add accessors for the PPC 403 bank registers. · c4ce4298
  Joerg Sonnenberger authored Aug 05, 2014
  c4ce4298
- Specify that the thumb setend and blx <immed> instructions are not valid on an m-class target · 10457175
  Keith Walker authored Aug 05, 2014
  10457175
- Define stc2/stc2l/ldc2/ldc2l as thumb2 instructions · 292aa3d5
  Keith Walker authored Aug 05, 2014
  292aa3d5
- Accessors for SSR2 and SSR3 on PPC 403. · 936a4c8c
  Joerg Sonnenberger authored Aug 05, 2014
  936a4c8c
- R600/SI: Update MUBUF assembly string to match AMD proprietary compiler · 229d5e66
  Tom Stellard authored Aug 05, 2014
  229d5e66
- R600/SI: Avoid generating REGISTER_LOAD instructions. · b37f7976
  Tom Stellard authored Aug 05, 2014
  b37f7976
- Add dci/ici instructions for PPC 476 and friends. · 41247127
  Joerg Sonnenberger authored Aug 05, 2014
  41247127
- Add mftblo and mftbhi for PPC 4xx. · 048284e1
  Joerg Sonnenberger authored Aug 05, 2014
  048284e1
- Add lswi / stswi for assembler use with a warning to not add patterns · 9dedceb7
  Joerg Sonnenberger authored Aug 05, 2014
  9dedceb7
- AArch64: Add support for instruction prefetch intrinsic · e56de695
  Yi Kong authored Aug 05, 2014
  e56de695
- Teach the SLP Vectorizer that keeping some values live over a callsite can have a cost. · 2b8933c3
  James Molloy authored Aug 05, 2014
  2b8933c3
- [x86] Reformat some code I moved around in a prior commit but left · 183771bd
  Chandler Carruth authored Aug 05, 2014
  183771bd
- Allow binary and for tblgen math. · 6b41a990
  Joerg Sonnenberger authored Aug 05, 2014
  6b41a990
- [x86] Fix a crash and wrong-code bug in the new vector lowering all · 947cef19
  Chandler Carruth authored Aug 05, 2014
  947cef19
- [FastIsel][AArch64] Fix previous commit r214844 (Don't perform... · 95033277
  Juergen Ributzka authored Aug 05, 2014
  95033277