Commits · d019dbf75efa952bef5eba000f808b945df09821 · Roger Ferrer / llvm-epi · GitLab

Dec 20, 2012
- fix most of remaining issues with large frames. · d019dbf7
  Reed Kotler authored Dec 20, 2012
  d019dbf7
- [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy · f4236721
  Akira Hatanaka authored Dec 20, 2012
  f4236721
- Fix use-before-construction of X86TargetLowering. · 15b1e372
  Richard Smith authored Dec 20, 2012
  15b1e372
- [mips] Change the order of template parameters. Move the default parameters to · 7d75f9e3
  Akira Hatanaka authored Dec 20, 2012
  7d75f9e3
- [mips] Refactor shift instructions with register operands. Separate encoding · 244f9e87
  Akira Hatanaka authored Dec 20, 2012
  244f9e87
- [mips] Refactor shift immediate instructions. Separate encoding information · 7f96ad32
  Akira Hatanaka authored Dec 20, 2012
  7f96ad32
- [mips] Refactor arithmetic and logic instructions with immediate operands. · ab1b715b
  Akira Hatanaka authored Dec 20, 2012
  ab1b715b
- [mips] Refactor arithmetic and logic instructions. Separate encoding · 1b37c4af
  Akira Hatanaka authored Dec 20, 2012
  1b37c4af
- [mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR and · 73495897
  Akira Hatanaka authored Dec 20, 2012
  73495897
- Target/R600: Update MIB according to r170588. · 2a0b40f5
  NAKAMURA Takumi authored Dec 20, 2012
  2a0b40f5
- MC: Add MCInstrDesc::mayAffectControlFlow() method. · 6df94846
  Jim Grosbach authored Dec 19, 2012
  6df94846
Dec 19, 2012
- R600: Remove unecessary VREG alignment. · 1c315d54
  Tom Stellard authored Dec 19, 2012
  1c315d54
- R600: control flow optimization · e7b907d8
  Tom Stellard authored Dec 19, 2012
  e7b907d8
- R600: New control flow for SI v2 · f8794354
  Tom Stellard authored Dec 19, 2012
  f8794354
- Remove the explicit MachineInstrBuilder(MI) constructor. · b159b5ff
  Jakob Stoklund Olesen authored Dec 19, 2012
  b159b5ff
- LLVM sdisel normalize bit extraction of the form: · eae6d2cc
  Evan Cheng authored Dec 19, 2012
  eae6d2cc
- Remove edis - the enhanced disassembler. Fixes PR14654. · e3d32305
  Roman Divacky authored Dec 19, 2012
  e3d32305
- Transform (x&C)>V into (x&C)!=0 where possible · 5917f4c7
  Paul Redmond authored Dec 19, 2012
  5917f4c7
- PowerPC: Expand VSELECT nodes. · c5071466
  Benjamin Kramer authored Dec 19, 2012
  c5071466
- Change TargetLowering::getTypeForExtArgOrReturn to take and return · e09cac9a
  Patrik Hagglund authored Dec 19, 2012
  e09cac9a
- Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of · bad545cc
  Patrik Hagglund authored Dec 19, 2012
  bad545cc
- Change TargetLowering::findRepresentativeClass to take an MVT, instead · f9eb168e
  Patrik Hagglund authored Dec 19, 2012
  f9eb168e
- X86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parentheses] · 89209462
  NAKAMURA Takumi authored Dec 19, 2012
  89209462
- Optimized load + SIGN_EXTEND patterns in the X86 backend. · 14a4af0e
  Elena Demikhovsky authored Dec 19, 2012
  14a4af0e
- Rename the 'Attributes' class to 'Attribute'. It's going to represent a single... · 3d7b0b8a
  Bill Wendling authored Dec 19, 2012
  3d7b0b8a
- Add some missing Defs and Uses. · 3aad762d
  Reed Kotler authored Dec 19, 2012
  3aad762d
Dec 18, 2012
- Reverse order of checking SSE level when calculating compare cost, so we check · 338863a5
  Jakub Staszak authored Dec 18, 2012
  338863a5
- Disable ARM partial flag dependency optimization at -Oz · 23b404d5
  Quentin Colombet authored Dec 18, 2012
  23b404d5
- Get rid of the pesky -Woverloaded-virtual warning. No change in functionality. · 39e7c6e3
  Eli Bendersky authored Dec 18, 2012
  39e7c6e3
- Repair bundles that were broken by removing and reinserting the first · 41bbf9c2
  Jakob Stoklund Olesen authored Dec 18, 2012
  41bbf9c2
- Extract a method, no functional change intended. · 43b1e133
  Jakob Stoklund Olesen authored Dec 18, 2012
  43b1e133
Dec 17, 2012
- [arm fast-isel] Minor cleanup. No functional change intended. · 150d35bc
  Chad Rosier authored Dec 17, 2012
  150d35bc
- [arm fast-isel] Fast-isel only handles simple VTs, so make sure the necessary · 62a144f0
  Chad Rosier authored Dec 17, 2012
  62a144f0
- Add instruction encodings / disassembly support for l2r instructions. · 459e35c2
  Richard Osborne authored Dec 17, 2012
  459e35c2
- R600: enable S_*N2_* instructions · 5a687946
  Tom Stellard authored Dec 17, 2012
  5a687946
- R600: BB operand support for SI · 9e90b589
  Tom Stellard authored Dec 17, 2012
  9e90b589
- R600: remove nonsense setPrefLoopAlignment · 16a17c6d
  Tom Stellard authored Dec 17, 2012
  16a17c6d
- Revert/correct some FastISel changes in r170104 (EVT->MVT for · c494d24a
  Patrik Hagglund authored Dec 17, 2012
  c494d24a
- Add instruction encodings for PEEK and ENDIN. · 51bf1b26
  Richard Osborne authored Dec 17, 2012
  51bf1b26
- Fix parameter name in prototypes in XCoreDisassembler. · c104bf27
  Richard Osborne authored Dec 17, 2012
  c104bf27