Commits · d13b0bfdacb84b1653245fa1d0ac66819b84cd62 · Roger Ferrer / llvm-epi · GitLab

Apr 23, 2017
- [X86][SSE] Add scheduling latency/throughput tests for SSSE3 instructions · c781c0f6
  Simon Pilgrim authored Apr 23, 2017
  c781c0f6
- [X86][SSE] Add scheduling latency/throughput tests for SSE3 instructions · e8f8422f
  Simon Pilgrim authored Apr 23, 2017
  e8f8422f
- [X86] Convert test checks to generated checks of update_llc_test_checks.py. NFC · 544988f3
  Ayman Musa authored Apr 23, 2017
  544988f3
- [ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs · 53cf1897
  Artyom Skrobov authored Apr 23, 2017
  53cf1897
- Fix testcase: s/CHECKNEXT/CHECK-NEXT/ · 1233fe5a
  Jon Roelofs authored Apr 22, 2017
  1233fe5a
Apr 22, 2017
- [X86] Regenerate TLS tests · f27a714a
  Simon Pilgrim authored Apr 22, 2017
  f27a714a
- [globalisel][tablegen] Fix PR32733 by checking which instruction operands belong to. · 3016d3c6
  Daniel Sanders authored Apr 22, 2017
  3016d3c6
- Fix test from polluting the source tree · 6cce6902
  David Blaikie authored Apr 22, 2017
  6cce6902
- Move Split DWARF handling to an MC option/command line argument rather than using metadata · 96b1ed50
  David Blaikie authored Apr 21, 2017
  96b1ed50
- AArch64FrameLowering: Check if the ExtraCSSpill register is actually unused · d78597ec
  Matthias Braun authored Apr 21, 2017
  d78597ec
Apr 21, 2017
- Re-commit r301040 "X86: Don't emit zero-byte functions on Windows" · 9b9a5358
  Hans Wennborg authored Apr 21, 2017
  9b9a5358
- Revert r301040 "X86: Don't emit zero-byte functions on Windows" · 04593000
  Hans Wennborg authored Apr 21, 2017
  04593000
- X86: Don't emit zero-byte functions on Windows · cb3e8107
  Hans Wennborg authored Apr 21, 2017
  cb3e8107
- AArch64: add test for "fence singlethread" · 1efaa3a8
  Tim Northover authored Apr 21, 2017
  1efaa3a8
- ARM: make sure we use all entries in a vector before forming a vpaddl. · e31cf3f8
  Tim Northover authored Apr 21, 2017
  e31cf3f8
- AMDGPU: Temporarily disable packed inlinable literals (v2f16, v2i16) · 3d1cc88c
  Konstantin Zhuravlyov authored Apr 21, 2017
  3d1cc88c
- AMDGPU: Fix S_PACK_HH_B32_B16 · 88938d4e
  Konstantin Zhuravlyov authored Apr 21, 2017
  88938d4e
- [AMDGPU] Handle SI_MASKED_UNREACHABLE in instruction emitter · 15a96b1d
  Yaxun Liu authored Apr 21, 2017
  15a96b1d
- AMDGPU: Do not lower fast unsafe div for safe, f32, with fp32 denormals · c4b18e70
  Konstantin Zhuravlyov authored Apr 21, 2017
  c4b18e70
- [AArch64] Improve code generation for logical instructions taking · 22e839f4
  Akira Hatanaka authored Apr 21, 2017
  22e839f4
- ARM: don't try to create an i8 -> i32 vpaddl. · 1061ccca
  Tim Northover authored Apr 21, 2017
  1061ccca
- [ConstHoisting] Add BFI in constanthoisting pass and select the best insertion · 337d4d95
  Wei Mi authored Apr 21, 2017
  337d4d95
- [ARM] GlobalISel: Add support for G_TRUNC · 64a33431
  Diana Picus authored Apr 21, 2017
  64a33431
- [ARM] GlobalISel: Make struct arguments fail elegantly · f941ec0e
  Diana Picus authored Apr 21, 2017
  f941ec0e
- add skylake · 00b51bf1
  Clement Courbet authored Apr 21, 2017
  00b51bf1
- add 32 bit tests · 2430e25b
  Clement Courbet authored Apr 21, 2017
  2430e25b
- use repmovsb when optimizing forminsize · d5f6182b
  Clement Courbet authored Apr 21, 2017
  d5f6182b
- Rename FastString flag. · 203fc177
  Clement Courbet authored Apr 21, 2017
  203fc177
- add more tests · a7c233fb
  Clement Courbet authored Apr 21, 2017
  a7c233fb
- X86 memcpy: use REPMOVSB instead of REPMOVS{Q,D,W} for inline copies · 1ce3b82d
  Clement Courbet authored Apr 21, 2017
  1ce3b82d
- [Thumb1] The recently added tADCS and tSBCS pseudo-instructions were missing `Uses = [CPSR]` · 8d964300
  Artyom Skrobov authored Apr 21, 2017
  8d964300
- Revert r300932 and r300930. · 78ccba6a
  Akira Hatanaka authored Apr 21, 2017
  78ccba6a
- [AArch64] Improve code generation for logical instructions taking · 19077aae
  Akira Hatanaka authored Apr 21, 2017
  19077aae
- Revert "[AArch64] Improve code generation for logical instructions taking" · 7b06cebe
  Akira Hatanaka authored Apr 20, 2017
  7b06cebe
- [AArch64] Improve code generation for logical instructions taking · e327f098
  Akira Hatanaka authored Apr 20, 2017
  e327f098
Apr 20, 2017
- ARM: lower "fence singlethread" to a pure compiler barrier. · 46e58354
  Tim Northover authored Apr 20, 2017
  46e58354
- ARM: handle post-indexed NEON ops where the offset isn't the access width. · 8b1240b0
  Tim Northover authored Apr 20, 2017
  8b1240b0
- CodeGen: Let frame index value type match alloca addr space · 5d977f8e
  Yaxun Liu authored Apr 20, 2017
  5d977f8e
- [mips][msa] Mask vectors holding shift amounts · 2b6fe3ff
  Petar Jovanovic authored Apr 20, 2017
  2b6fe3ff
- Temporarily revert r299221 to fix nondeterminism in ThinLTO builder. · 2cc97d92
  Galina Kistanova authored Apr 19, 2017
  2cc97d92