Commits · d15477b09d3142b4301f6e7bc8835ec04d639f59 · Roger Ferrer / llvm-epi · GitLab

Oct 21, 2016
- Revert "[GVN/PRE] Hoist global values outside of loops." · d15477b0
  Davide Italiano authored Oct 21, 2016
  d15477b0
Oct 20, 2016
- [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV · fcfe8cd3
  Li Huang authored Oct 20, 2016
  fcfe8cd3
- Fix PREL31 relocation on ARM · c32ffe39
  Keno Fischer authored Oct 20, 2016
  c32ffe39
- [X86] Enable interleaved memory access by default · b2443ed6
  Michael Kuperstein authored Oct 20, 2016
  b2443ed6
- Another additional error check for invalid Mach-O files for the · c8bb4228
  Kevin Enderby authored Oct 20, 2016
  c8bb4228
- [AMDGPU] Emit constant address space data in .rodata section and use... · 08326b62
  Konstantin Zhuravlyov authored Oct 20, 2016
  08326b62
- Using branch probability to guide critical edge splitting. · f03f5155
  Dehao Chen authored Oct 20, 2016
  f03f5155
- [CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv uniformconst costs for 256/512 bit integer vectors · 365be4f9
  Simon Pilgrim authored Oct 20, 2016
  365be4f9
- Fix *_EXTEND_VECTOR_INREG legalization · 05b0f93a
  Pirama Arumuga Nainar authored Oct 20, 2016
  05b0f93a
- [CostModel][X86] Added tests for sdiv/udiv costs for uniform const and uniform const power-of-2 · 1388c0ac
  Simon Pilgrim authored Oct 20, 2016
  1388c0ac
- [CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv general costs for 256/512 bit integer vectors · 025e26dd
  Simon Pilgrim authored Oct 20, 2016
  025e26dd
- [AMDGPU] add fcopysign(f64, f32) pattern · e55fd41f
  Valery Pykhtin authored Oct 20, 2016
  e55fd41f
- [mips][mcjit] Add the majority of N32 support. · 226752c1
  Simon Dardis authored Oct 20, 2016
  226752c1
- [CostModel][X86] Added tests for sdiv/udiv costs for scalar and 128/256/512 bit integer vectors · 16cc616e
  Simon Pilgrim authored Oct 20, 2016
  16cc616e
- [DAGCombiner] Add general constant vector support to (srl (shl x, c), c) -> (and x, cst2) · 618d3aed
  Simon Pilgrim authored Oct 20, 2016
  618d3aed
- [SystemZ] Post-RA scheduler implementation · 8010b631
  Jonas Paulsson authored Oct 20, 2016
  8010b631
- X86: Allow expressions to appear as u8imm operands. · c7766778
  Peter Collingbourne authored Oct 20, 2016
  c7766778
- DebugInfo: remove broken bitcode upgrade test · 2461a2e2
  Victor Leschuk authored Oct 20, 2016
  2461a2e2
- DebugInfo: preparation to implement DW_AT_alignment · 2ede126b
  Victor Leschuk authored Oct 20, 2016
  2ede126b
- [WebAssembly] Update extending load test for new i1 behavior · 7edf93bc
  Derek Schuff authored Oct 20, 2016
  7edf93bc
- Next set of additional error checks for invalid Mach-O files for the · 210030ba
  Kevin Enderby authored Oct 19, 2016
  210030ba
- [PGO] Fix bogus warning for merging empty llvm profile file · 2c684cfd
  Rong Xu authored Oct 19, 2016
  2c684cfd
- AMDGPU : Add a function to enable and disable IEEEBit for SC and shader · 3cb2a1e8
  Wei Ding authored Oct 19, 2016
  3cb2a1e8
- Remove the JIT EH/small code model tests for now. · 412d045e
  Lang Hames authored Oct 19, 2016
  412d045e
Oct 19, 2016
- [InstSimplify] fold negation of sign-bit · efd88857
  Sanjay Patel authored Oct 19, 2016
  efd88857
- [GlobalMerge] Handle non-landingpad EH pads · f8d1d12f
  Reid Kleckner authored Oct 19, 2016
  f8d1d12f
- [IndVarSimplify] Teach calculatePostIncRange to take guards into account · 5c6ef754
  Artur Pilipenko authored Oct 19, 2016
  5c6ef754
- [LV] Avoid emitting trivially dead instructions · 41fa838f
  Matthew Simpson authored Oct 19, 2016
  41fa838f
- [AliasSetTracker] Add support for memcpy and memmove. · 6e3a92ec
  Chad Rosier authored Oct 19, 2016
  6e3a92ec
- [IndVarSimplify] Use control-dependent range information to prove non-negativity · f2d5dc5d
  Artur Pilipenko authored Oct 19, 2016
  f2d5dc5d
- [InstSimplify] move one and add more tests for potential negation folds · cf26c274
  Sanjay Patel authored Oct 19, 2016
  cf26c274
- [DAGCombiner] Add general constant vector support to (shl (add x, c1), c2) ->... · a20aeea9
  Simon Pilgrim authored Oct 19, 2016
  a20aeea9
- [WinEH] Allow catchpads to reuse the same catch object · f7ad5341
  Reid Kleckner authored Oct 19, 2016
  f7ad5341
- [DAG] optimize negation of bool · 3a3aaf67
  Sanjay Patel authored Oct 19, 2016
  3a3aaf67
- [RDF] Switch RefMap in liveness calculation to use lane masks · 7bb63ac0
  Krzysztof Parzyszek authored Oct 19, 2016
  7bb63ac0
- [DAGCombiner] Add general constant vector support to (shl (sra x, c1), c1) -> (and x, (shl -1, c1)) · 4554e161
  Simon Pilgrim authored Oct 19, 2016
  4554e161
- [DAGCombiner] Add general constant vector support to (shl (mul x, c1), c2) -> (mul x, c1 << c2) · c2e97249
  Simon Pilgrim authored Oct 19, 2016
  c2e97249
- Sparc: fix test. · 34c83da4
  Tim Northover authored Oct 19, 2016
  34c83da4
- GlobalISel: support translating volatile loads and stores. · 7152dcaf
  Tim Northover authored Oct 19, 2016
  7152dcaf
- [Sparc][LEON] Detects an erratum on UT699 LEON 3 processors involving rounding... · 2c3cdd66
  Chris Dewhurst authored Oct 19, 2016
  2c3cdd66