Commits · d32fa59fa007ba53b8453f96a5661b149e4715c7 · Roger Ferrer / llvm-epi · GitLab

Feb 27, 2020
- [XCOFF] Don't emit non-external labels in the symbol table and handle MCSA_LGlobal · d32fa59f
  David Tenty authored Feb 27, 2020
  d32fa59f
- [AMDGPU] improve fragile test for divergent branches · 0c8a2187
  Sameer Sahasrabuddhe authored Feb 27, 2020
  0c8a2187
- Revert "[ARM] Add CPSR as an implicit use of t2IT" · 965ba429
  Sam Parker authored Feb 27, 2020
  965ba429
- [X86] createVariablePermute - handle case where recursive createVariablePermute call fails · 6bdd63dc
  Simon Pilgrim authored Feb 27, 2020
  6bdd63dc
- [CallSiteInfo] Handle bundles when updating call site info · 016d91cc
  Djordje Todorovic authored Feb 27, 2020
  016d91cc
- [AArch64][SVE] Add intrinsics for first-faulting gather loads · fa9439fa
  Andrzej Warzynski authored Feb 21, 2020
  fa9439fa
- [AVX] Cleanup check prefixes · 45abcd1d
  Simon Pilgrim authored Feb 27, 2020
  45abcd1d
- [ARM] Fixup FP16 bitcasts · 13f2a588
  David Green authored Feb 25, 2020
  13f2a588
- Revert "[Hexagon] Improve casting of boolean HVX vectors to scalars" · 01472841
  Kirill Bobyrev authored Feb 27, 2020
  01472841
- [ARM] Add CPSR as an implicit use of t2IT · e58229fd
  Sam Parker authored Feb 27, 2020
  e58229fd
- [NFC][ARM] Add test case · 72f044ec
  Sam Parker authored Feb 27, 2020
  
  72f044ec
- [AArch64] Peephole optimization: merge AND and TST instructions · 13db7490
  Sjoerd Meijer authored Feb 27, 2020
  13db7490
- AMDGPU/GlobalISel: Add missing test for G_UMULH · 79493e72
  Matt Arsenault authored Feb 26, 2020
  
  79493e72
- GlobalISel: Fix lowering for G_UADDE/G_USUBE · 6fc0d008
  Matt Arsenault authored Feb 26, 2020
  6fc0d008
- AMDGPU/GlobalISel: Add missing G_[US]ADDE/G_[US]SUBE tests · 6dcf4310
  Matt Arsenault authored Feb 26, 2020
  6dcf4310
- [X86] Add test cases showing incorrect setting of nofpexcept flag due to CSE... · 21056a4e
  Craig Topper authored Feb 26, 2020
  21056a4e
Feb 26, 2020
- [AArch64][GlobalISel] Fixup <32b heterogeneous regbanks of G_PHIs just before selection. · 65f99b53
  Amara Emerson authored Feb 24, 2020
  65f99b53
- [AVR] Fix private label prefix · 6afc3de4
  Ayke van Laethem authored Feb 25, 2020
  6afc3de4
- [Hexagon] Improve casting of boolean HVX vectors to scalars · 7691790d
  Krzysztof Parzyszek authored Feb 26, 2020
  7691790d
- [PowerPC][NFC] Convert grep usage to FileCheck in lit test. · 73c3b526
  Sean Fertile authored Feb 26, 2020
  
  73c3b526
- [DAGCombiner] avoid narrowing fake fneg vector op · b3d0c798
  Sanjay Patel authored Feb 26, 2020
  b3d0c798
- [AArch64] add tests for fake fneg; NFC · 894ce940
  Sanjay Patel authored Feb 26, 2020
  894ce940
- [DAG] visitRotate - modulo non-uniform constant rotation amounts · bbb0933e
  Simon Pilgrim authored Feb 26, 2020
  
  bbb0933e
- [ARM,MVE] Add predicated intrinsics for many unary functions. · 9eb3cc10
  Simon Tatham authored Feb 26, 2020
  9eb3cc10
- [AIX] Remove whitelist checking for ExternalSymbolSDNodes · e7375e99
  Xiangling Liao authored Feb 26, 2020
  e7375e99
- AMDGPU: Fix some more incorrect check lines · 09a6b267
  Jay Foad authored Feb 26, 2020
  
  09a6b267
- AMDGPU/SIInsertSkips: Fix the determination of whether early-exit-after-kill is possible · 0f1df489
  Nicolai Hähnle authored Feb 21, 2020
  0f1df489
- [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup · 9c859fc5
  Kerry McLaughlin authored Feb 26, 2020
  9c859fc5
- [AArch64] Flip default for register renaming in the ld/st optimizier. · a059be72
  Florian Hahn authored Feb 26, 2020
  a059be72
- AMDGPU: Fix some incorrect FUNC-LABEL checks · 80d7e473
  Jay Foad authored Feb 26, 2020
  
  80d7e473
- [PowerPC] Fix the unexpected modification caused by D62993 in LowerSELECT_CC for power9 · b083d7a3
  Kang Zhang authored Feb 26, 2020
  b083d7a3
- [SelectionDAG][PowerPC][AArch64][X86][ARM] Add chain input and output the ISD::FLT_ROUNDS_ · 735d27dc
  Craig Topper authored Feb 25, 2020
  735d27dc
Feb 25, 2020
- [WebAssembly] Simplify extract_vector lowering · 0906dca4
  Thomas Lively authored Feb 21, 2020
  0906dca4
- [X86] Add test to show incorrect ordering of flt.rounds intrinsic relative to calls to fesetround. · c5ce6d8b
  Craig Topper authored Feb 25, 2020
  c5ce6d8b
- Emit register names in cfi assembly directives · 7f3afd48
  Scott Linder authored Feb 25, 2020
  7f3afd48
- [PowerPC][NFC] Remove comments mentioning Darwin and VRSAVE from lit test. · eb1c040b
  Sean Fertile authored Feb 25, 2020
  
  eb1c040b
- [Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile · d20907d1
  Roman Lebedev authored Feb 25, 2020
  d20907d1
- [NFC][Codegen] Add miscompile test for constant store merging from PR43446 · 342eca29
  Roman Lebedev authored Feb 25, 2020
  342eca29
- AMDGPU/GlobalISel: Un-XFAIL a test · c66db211
  Jay Foad authored Feb 25, 2020
  c66db211
- AMDGPU/GlobalISel: Use packed for G_ADD/G_SUB/G_MUL v2s16 · 86e13ec1
  Matt Arsenault authored Feb 17, 2020
  
  86e13ec1