Commits · d403664ed844e96d6b23b15fe16c735ab2e375b1 · Roger Ferrer / llvm-epi · GitLab

Apr 16, 2015
- Switch lowering: extract jump tables and bit tests before building binary tree (PR22262) · d403664e
  Hans Wennborg authored Apr 16, 2015
  d403664e
- [mips] [IAS] Preserve microMIPS label marking for objects when assigning. · 2cc44f50
  Toma Tabacu authored Apr 16, 2015
  2cc44f50
- Don't depend on the order relocations are written to a .o file. · 5ffca73b
  Rafael Espindola authored Apr 16, 2015
  5ffca73b
- [ARM] Add v8.1a "Privileged Access Never" extension · 0e0f8d2c
  Vladimir Sukharev authored Apr 16, 2015
  0e0f8d2c
- [mips] [IAS] Add support for the .insn directive. · 9ca5096f
  Toma Tabacu authored Apr 16, 2015
  9ca5096f
Apr 15, 2015
- Fix BXJ is undefined in AArch32. · 6f13d0ca
  Charlie Turner authored Apr 15, 2015
  6f13d0ca
- Make it explicit which sections these relocations are in. · 7fa23fc7
  Rafael Espindola authored Apr 15, 2015
  7fa23fc7
- Make it clear in which sections these relocations are. · f3c6aa2c
  Rafael Espindola authored Apr 15, 2015
  f3c6aa2c
- Make it clear where the relocations we are CHECKING are from. · f80fc10b
  Rafael Espindola authored Apr 15, 2015
  f80fc10b
- Update tests to not be as dependent on section numbers. · 10f3de68
  Rafael Espindola authored Apr 15, 2015
  10f3de68
- Write section and section table entries in the same order. · bf0db6ca
  Rafael Espindola authored Apr 15, 2015
  bf0db6ca
Apr 14, 2015
- [AArch64] Allow non-standard INS/DUP encodings · b913653b
  Bradley Smith authored Apr 14, 2015
  b913653b
- Re-enable target-specific relocation table sorting and use it for Mips · 0380d0b8
  Petar Jovanovic authored Apr 14, 2015
  0380d0b8
Apr 13, 2015
- [MC] Write padding into fragments when -mc-relax-all flag is used · 9e0c890f
  Petr Hosek authored Apr 12, 2015
  9e0c890f
Apr 11, 2015
- Add direct moves to/from VSR and exploit them for FP/INT conversions · c38b5311
  Nemanja Ivanovic authored Apr 11, 2015
  c38b5311
Apr 10, 2015
- [mips] [IAS] Make the mips-expansions-bad.s test more readable. NFC. · 038a330e
  Toma Tabacu authored Apr 10, 2015
  038a330e
- Add LLVM support for remaining integer divide and permute instructions from ISA 2.06 · c0904791
  Nemanja Ivanovic authored Apr 09, 2015
  c0904791
Apr 08, 2015
- [mips] [IAS] Do not generate redundant move when expanding lw/sw with symbol. · c6ce0749
  Toma Tabacu authored Apr 08, 2015
  c6ce0749
- [mips] [IAS] Add support for the BNEZL and BEQZL pseudo-instructions. · 91fc0b3c
  Toma Tabacu authored Apr 08, 2015
  91fc0b3c
- Write the section header in the end. · 7230f80e
  Rafael Espindola authored Apr 08, 2015
  7230f80e
- [mips] [IAS] Remove AssemblerPredicate's from RelocPIC and RelocStatic. · 7567a10c
  Toma Tabacu authored Apr 08, 2015
  7567a10c
- R600/SI: Initial support for assembler and inline assembly · d7e6f136
  Tom Stellard authored Apr 08, 2015
  d7e6f136
- AArch64: disallow "fmov sD, #-0.0" during assembly. · 5b44f1ba
  Tim Northover authored Apr 07, 2015
  5b44f1ba
Apr 07, 2015
- [mips] [IAS] Allow .set assignments for already defined symbols. · f25949b5
  Toma Tabacu authored Apr 07, 2015
  f25949b5
Apr 06, 2015
- ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available. · 42335572
  Tim Northover authored Apr 06, 2015
  42335572
- Use a comma after the unique keyword. · 41e2b5c5
  Rafael Espindola authored Apr 06, 2015
  41e2b5c5
- Be consistent when deciding if a relocation is needed. · 94a88d71
  Rafael Espindola authored Apr 06, 2015
  94a88d71
- Store the sh_link of ARM_EXIDX directly in MCSectionELF. · 61e8ce36
  Rafael Espindola authored Apr 06, 2015
  61e8ce36
Apr 04, 2015
- Implement unique sections with an unique ID. · 8ca44f0b
  Rafael Espindola authored Apr 04, 2015
  8ca44f0b
Apr 03, 2015
- MC: For variable symbols, maintain MCSymbol::Section as a cache. · 10d362c5
  Peter Collingbourne authored Apr 03, 2015
  10d362c5
Apr 02, 2015
- Revert r233595, "MC: For variable symbols, maintain MCSymbol::Section as a cache." · 949eb3f6
  Peter Collingbourne authored Apr 02, 2015
  949eb3f6
Apr 01, 2015
- [ARM] Rename v8.1a from "extension" to "architecture" · 2afdb32c
  Vladimir Sukharev authored Apr 01, 2015
  2afdb32c
- [SystemZ] Support transactional execution on zEC12 · 57c85f53
  Ulrich Weigand authored Apr 01, 2015
  57c85f53
Mar 31, 2015
- Expand MUX instructions early on Hexagon · c05dff17
  Krzysztof Parzyszek authored Mar 31, 2015
  c05dff17
- Revert 233694. Weak SVN-fu. · 8c4fd2bd
  Krzysztof Parzyszek authored Mar 31, 2015
  8c4fd2bd
- Expand MUX instructions early on Hexagon · 261d62c8
  Krzysztof Parzyszek authored Mar 31, 2015
  261d62c8
- [AArch64] Add v8.1a "Rounding Double Multiply Add/Subtract" extension · 297bf0ea
  Vladimir Sukharev authored Mar 31, 2015
  297bf0ea
- [SystemZ] Support RISBGN instruction on zEC12 · 371d10a4
  Ulrich Weigand authored Mar 31, 2015
  371d10a4
- [SystemZ] Use POPCNT instruction on z196 · b401218c
  Ulrich Weigand authored Mar 31, 2015
  b401218c
- Fix the operand encoding in the test instruction. · dd3add6c
  Rafael Espindola authored Mar 31, 2015
  dd3add6c