Show failure to simplify cases with zero op/flags

llvm-svn: 352196

If a stack trace or similar has a list of addresses from an executable
or DSO loaded at a variable address (e.g. due to ASLR), the addresses
will not directly correspond to the addresses stored in the object file.
If a user wishes to use llvm-symbolizer, they have to subtract the load
address from every address. This is somewhat inconvenient, especially as
the output of --print-address will result in the adjusted address being
listed, rather than the address coming from the stack trace, making it
harder to map results between the two.

This change adds a new switch to llvm-symbolizer --adjust-vma which
takes an offset, which is then used to automatically do this
calculation. The printed address remains the input address (allowing for
easy mapping), whilst the specified offset is applied to the addresses
when performing the lookup.

The switch is conceptually similar to llvm-objdump's new switch of the
same name (see D57051), which in turn mirrors a GNU switch. There is no
equivalent switch in addr2line.

Reviewed by: grimar

Differential Revision: https://reviews.llvm.org/D57151

llvm-svn: 352195

llvm-svn: 352194

llvm-svn: 352193

llvm-svn: 352192

llvm-svn: 352191

llvm-svn: 352190

Same as ARM.

On this occasion we split some of the instruction select tests for more
complicated instructions into their own files, so we can reuse them for
ARM and Thumb mode. Likewise for the legalizer tests.

llvm-svn: 352188

r351882 introduced some superfluous calls to mark G_INTTOPTR and
G_PTRTOINT as legal (looks like a rebase mishap). Remove them.

llvm-svn: 352187

llvm-svn: 352186

This patch extends TableGen language with !cond operator.
Instead of embedding !if inside !if which can get cumbersome,
one can now use !cond.
Below is an example to convert an integer 'x' into a string:

    !cond(!lt(x,0) : "Negative",
          !eq(x,0) : "Zero",
          !eq(x,1) : "One,
          1        : "MoreThanOne")

Reviewed By: hfinkel, simon_tatham, greened
Differential Revision: https://reviews.llvm.org/D55758

llvm-svn: 352185

Summary: This is used for debugging purpose.

Reviewers: sammccall

Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D57057

llvm-svn: 352184

Summary: Adds a clang-tidy warning for underscores in googletest names.

Patch by Kar Epker!

Reviewers: hokein, alexfh, aaron.ballman

Reviewed By: hokein

Subscribers: Eugene.Zelenko, JonasToth, MyDeveloperDay, lebedev.ri, xazax.hun, mgorny, cfe-commits

Tags: #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D56424

llvm-svn: 352183

This change adds an option -g to llvm-objcopy which is an alias for the existing option --strip-debug.

This fixes PR40003.

Reviewed by: alexshap

Differential Revision: https://reviews.llvm.org/D57217

llvm-svn: 352182

Relocatable code generation is meaningless on MSP430, as the platform is too small to use shared libraries.

Patch by Dmitry Mikushev!

Differential Revision: https://reviews.llvm.org/D56927

llvm-svn: 352181

llvm-svn: 352180

Match the coverage of test\CodeGen\X86\avx512-shuffle-schedule.ll so we can get rid of -print-schedule (and fix PR37160) without losing schedule tests

llvm-svn: 352179

Align checks for absolute addressing mode with its current
implementation (SR is used as a base register).

This fixes https://bugs.llvm.org/show_bug.cgi?id=39993

Patch by Kristina Bessonova!

Differential Revision: https://reviews.llvm.org/D56785

llvm-svn: 352178

Patch by Kristina Bessonova!

Differential Revision: https://reviews.llvm.org/D57015

llvm-svn: 352177

llvm-svn: 352176

Summary:
The field `m_decompression_scratch_type` is only used when `HAVE_LIBCOMPRESSION` is
defined, which caused a warning which I fixed in rLLDB350675 by just marking the variable as always used.

This patch fixes this in a better way by only defining the variable (and the related `m_decompression_scratch`
variable) when `HAVE_LIBCOMPRESSION` is defined. This also required changing the way we handle
`HAVE_LIBCOMPRESSION` works, as this was previously always defined on macOS within the source file
but not in the header. Now it's always defined from within our config header when CMake defines it or when
we are on macOS.

The field initialization was moved to the header to prevent that we have `#ifdef` within our initializer list.

Reviewers: #lldb, jasonmolenda, sgraenitz, labath

Reviewed By: labath

Subscribers: labath, beanz, mgorny, lldb-commits, dblaikie

Differential Revision: https://reviews.llvm.org/D57011

llvm-svn: 352175

Fast selection of llvm icmp and fcmp instructions is not handled well about VSX instruction support.

We'd use VSX float comparison instruction instead of non-vsx float comparison instruction 
if the operand register class is VSSRC or VSFRC because i32 and i64 are mapped to VSSRC and 
VSFRC correspondingly if VSX feature is opened.

If the target does not have corresponding VSX instruction comparison for some type, 
just copy VSX-related register to common float register class and use non-vsx comparison instruction.

Differential Revision: https://reviews.llvm.org/D57078

llvm-svn: 352174

llvm-svn: 352173

[X86] Add non-masked versions of vpconflict intrinsics so we can use a select in the header file in clang.

I'll remove and autoupgrade the old intrinsics in a future commit.

llvm-svn: 352172

Follow the same custom legalisation strategy as used in D57085 for
variable-length shifts (see that patch summary for more discussion). Although
we may lose out on some late-stage DAG combines, I think this custom
legalisation strategy is ultimately easier to reason about.

There are some codegen changes in rv64m-exhaustive-w-insts.ll but they are all
neutral in terms of the number of instructions.

Differential Revision: https://reviews.llvm.org/D57096

llvm-svn: 352171

2nd part of D57095 with the same reason, just in another place. We never
fold branches that are not immediately in the current loop, but this check
is missing in `IsEdgeLive` As result, it may think that the edge in subloop is
dead while it's live. It's a pessimization in the current stance.

Differential Revision: https://reviews.llvm.org/D57147
Reviewed By: rupprecht	

llvm-svn: 352170

The previous DAG combiner-based approach had an issue with infinite loops
between the target-dependent and target-independent combiner logic (see
PR40333). Although this was worked around in rL351806, the combiner-based
approach is still potentially brittle and can fail to select the 32-bit shift
variant when profitable to do so, as demonstrated in the pr40333.ll test case.

This patch instead introduces target-specific SelectionDAG nodes for
SHLW/SRLW/SRAW and custom-lowers variable i32 shifts to them. pr40333.ll is a
good example of how this approach can improve codegen.

This adds DAG combine that does SimplifyDemandedBits on the operands (only
lower 32-bits of first operand and lower 5 bits of second operand are read).
This seems better than implementing SimplifyDemandedBitsForTargetNode as there
is no guarantee that would be called (and it's not for e.g. the anyext return
test cases). Also implements ComputeNumSignBitsForTargetNode.

There are codegen changes in atomic-rmw.ll and atomic-cmpxchg.ll but the new
instruction sequences are semantically equivalent.

Differential Revision: https://reviews.llvm.org/D57085

llvm-svn: 352169

Also move G_GEP actions together.

llvm-svn: 352168

llvm-svn: 352167

llvm-svn: 352166

llvm-svn: 352165

llvm-svn: 352162

llvm-svn: 352161

While a cold invoke itself and its unwind destination can't be
extracted, code which unconditionally executes before/after the invoke
may still be profitable to extract.

With cost model changes from D57125 applied, this gives a 3.5% increase
in split text across LNT+externals on arm64 at -Os.

llvm-svn: 352160

llvm-svn: 352159

when the binary loaded in memory has a section that we cannot find
in the on-disk version.  I added this warning out of an overabundance
of caution originally, but I've never seen an instance of it being
hit in the past few years, and there are some changes for the shared
cache on darwin systems where a segment is added when the shared
cache is constructed so we're now hitting this warning.  I've decided
to remove it altogether.

<rdar://problem/46889346> 

llvm-svn: 352158

Also legalize 64-bit compares for AMDGPU

llvm-svn: 352157

ACLE specifies that return type for rsr and rsr64 is uint32_t and
uint64_t respectively. D56852 change the return type of rsr64 from
unsigned long to unsigned long long which at least on Linux doesn't
match uint64_t, but the test isn't strict enough to detect that
because compiler implicitly converts unsigned long long to uint64_t,
but it breaks other uses such as printf with PRIx64 type specifier.
This change makes the test stricter enforcing that the return type
of rsr and rsr64 builtins is what is actually specified in ACLE.

Differential Revision: https://reviews.llvm.org/D57210

llvm-svn: 352156

llvm-svn: 352155

Summary:
Always try to detect and call internal or real libc symbols instead of
locally installed interceptors.

This covers:
 - GetTid()
 - TgKill()
 - Mmap()
 - Munmap()
 - Mprotect()

This cherry-picks code from sanitizer_common/sanitizer_netbsd.cc.

Reviewers: vitalybuka

Reviewed By: vitalybuka

Subscribers: llvm-commits, mgorny, #sanitizers

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D57179

llvm-svn: 352154