Commits · d4e7b000b2ebe7db2e2e1f3d0f5d37793e6d1c59 · Roger Ferrer / llvm-epi · GitLab

Apr 24, 2020
- [AArch64] Allow PAC mnemonics in the HINT space with PAC disabled · d4e7b000
  Pablo Barrio authored Mar 10, 2020
  d4e7b000
- [XRay] Change ARM/AArch64/powerpc64le to use version 2 sled (PC-relative address) · 25e22613
  Fangrui Song authored Apr 21, 2020
  25e22613
- [AArch32] Armv8.6a Matrix Mul Assembly Parsing Support · 659ca502
  Luke Geeson authored Apr 09, 2020
  659ca502
- [AArch64] Armv8.6-A Mat Mul SVE Assembly · e7146838
  Luke Geeson authored Apr 09, 2020
  e7146838
- [AArch32] Armv8.6-a Matrix Mult Assembly + Intrinsics · 7da19051
  Luke Geeson authored Apr 09, 2020
  7da19051
- [AArch64] Armv8.6-a Matrix Mult Assembly + Intrinsics · 832cd749
  Luke Geeson authored Apr 09, 2020
  832cd749
- [obj2yaml] - Program headers: simplify the computation of p_filesz. · 9f9a08e1
  Georgii Rymar authored Apr 22, 2020
  9f9a08e1
- [AMDGPU] Skip generating cache invalidating instructions on AMDPAL · 7631af3a
  Piotr Sobczak authored Apr 24, 2020
  7631af3a
- [ARM] Various tests for MVE and FP16 codegen. NFC · a947be51
  David Green authored Apr 23, 2020
  
  a947be51
- [SVE][CodeGen] Lower SDIV & UDIV to SVE intrinsics · 53dd72a8
  Kerry McLaughlin authored Apr 24, 2020
  53dd72a8
- [LoopVectorize] Preserve CFG analyses if CFG wasn't modified · 9cd4debd
  Max Kazantsev authored Apr 24, 2020
  9cd4debd
- [NFC][PowerPC] Fix the liveins for 3 mir test cases · 302e11cd
  Kang Zhang authored Apr 24, 2020
  
  302e11cd
- [AMDGPU] Add the SGPR used for FP copy to block livein lists. · 207cd5f6
  Christudasan Devadasan authored Apr 23, 2020
  207cd5f6
- [Attributor][NFC] Remove and update old check lines · 10ff24d8
  Johannes Doerfert authored Apr 22, 2020
  
  10ff24d8
- [Attributor][NFC] Strip check lines not used while 3 tests are partially disable · a6b14bae
  Johannes Doerfert authored Apr 22, 2020
  a6b14bae
- [ValueTracking] Handle shufflevector constants in ComputeNumSignBits · 3291efc2
  Eli Friedman authored Apr 22, 2020
  3291efc2
- [Hexagon] Fix result word order when bitcasting vector pred to int64/128 · 5c7a2cfa
  Krzysztof Parzyszek authored Apr 23, 2020
  
  5c7a2cfa
- Change callbr to only define its output SSA variable on the normal · 248a5db3
  James Y Knight authored Apr 16, 2020
  248a5db3
- [llvm] [CodeGen] Fixed vector halving bug for masked load · 907871d9
  aartbik authored Apr 23, 2020
  907871d9
- [llvm] [X86] Processed test with update_llc_test_checks · e4e187d2
  aartbik authored Apr 23, 2020
  e4e187d2
Apr 23, 2020
- [x86] add tests for FP->int->FP with different FP types; NFC · b53fd70b
  Sanjay Patel authored Apr 23, 2020
  
  b53fd70b
- [InstCombine] Negator: don't negate multi-use `sub` · 5a159ed2
  Roman Lebedev authored Apr 23, 2020
  5a159ed2
- [AMDGPU] Avoid hard-coded line numbers in error message checks · 479145a5
  Jay Foad authored Apr 23, 2020
  479145a5
- AMDGPU: Fix inlining logic for denormals · 156afb22
  Matt Arsenault authored Apr 22, 2020
  156afb22
- AMDGPU: Change pre-gfx9 implementation of fcanonicalize to mul · 89c8c80b
  Matt Arsenault authored Apr 22, 2020
  89c8c80b
- [llvm-objcopy][MachO] Copy LC_LOAD_WEAK_DYLIB load commands · d987eed9
  Alexander Shaposhnikov authored Apr 23, 2020
  d987eed9
- AMDGPU/GlobalISel: Add new baseline checks for canonicalize · 5fe3f065
  Matt Arsenault authored Apr 23, 2020
  
  5fe3f065
- [X86][SSE] Add SSE2 extract-concat tests · 757c7c24
  Simon Pilgrim authored Apr 23, 2020
  757c7c24
- [Hexagon] Add missing live-in registers in some codegen tests · d8e1dd8b
  Krzysztof Parzyszek authored Apr 23, 2020
  
  d8e1dd8b
- [InstCombine] substitute equivalent constant to reduce logic-of-icmps · 62da6ece
  Sanjay Patel authored Apr 23, 2020
  62da6ece
- [InstSimplify] fold and/or of compares with equality to min/max constant · e86eff0e
  Sanjay Patel authored Apr 23, 2020
  e86eff0e
- [InstCombine] add test for logic-of-icmps that should simplify (D78582); NFC · 6a10560f
  Sanjay Patel authored Apr 22, 2020
  
  6a10560f
- [UpdateTestChecks] Make generation of UTC_ARGS: comment more robust · f50bc823
  Alex Richardson authored Apr 23, 2020
  f50bc823
- [AMDGPU] Use SGPR instead of SReg classes · 0337017a
  Jay Foad authored Apr 22, 2020
  0337017a
- [AArch64] Define ACLE FP conversion intrinsics with more specific predicate. · a5e0389b
  Sander de Smalen authored Apr 23, 2020
  a5e0389b
- [AArch64][GlobalISel] Set the current debug loc when missing in some cases. · 613f12dd
  Amara Emerson authored Apr 23, 2020
  
  613f12dd
- [llvm] NFC: Fix trivial typo in rst and td files · 0312b9f5
  Kazuaki Ishizaki authored Apr 23, 2020
  0312b9f5
- [AArch64CollectLOH] Debug insts should not break LOH collection [14/14] · e0b60c6d
  Vedant Kumar authored Apr 17, 2020
  e0b60c6d
- [AArch64PreLegalizerCombiner] Fix debug invariance issue in matchFConstantToConstant [13/14] · ff8c417d
  Vedant Kumar authored Apr 16, 2020
  ff8c417d
- [AArch64LoadStoreOptimizer] Skip debug insts during pattern matching [12/14] · c2c2dc52
  Vedant Kumar authored Apr 17, 2020
  c2c2dc52