Commits · d5949429280b625d8d77becdb47fbd75bc8a4e0f · Roger Ferrer / llvm-epi · GitLab

Mar 14, 2018
- [X86][Btver2] Fix YMM shuffle, permute and permutevar scheduler costs · d5949429
  Simon Pilgrim authored Mar 14, 2018
  d5949429
- [X86][SSE] Use WriteFShuffleLd for MOVDDUP/MOVSHDUP/MOVSLDUP reg-mem instructions · de995e6e
  Simon Pilgrim authored Mar 14, 2018
  de995e6e
- [AArch64] Don't produce R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC · bde67728
  Martin Storsjö authored Mar 14, 2018
  bde67728
- [GlobalISel][X86] Support G_LSHR/G_ASHR/G_SHL · 0bd4d8c9
  Alexander Ivchenko authored Mar 14, 2018
  0bd4d8c9
- [GlobalIsel][X86] Support for G_ZEXT instruction · 327de805
  Alexander Ivchenko authored Mar 14, 2018
  327de805
- [X86] Re-generate test to get proper capitalization of its CHECK lines. NFC · 9ca7e67c
  Craig Topper authored Mar 13, 2018
  9ca7e67c
Mar 13, 2018
- [X86] Rewrite LowerAVXCONCAT_VECTORS similar to how we handle vXi1 concats. · cc060e92
  Craig Topper authored Mar 13, 2018
  cc060e92
- [DAGCombiner] Allow visitEXTRACT_SUBVECTOR to combine with BUILD_VECTORS... · 4aeec519
  Craig Topper authored Mar 13, 2018
  4aeec519
- [MIR] Allow frame-setup and frame-destroy on the same instruction · 3abf0573
  Francis Visoiu Mistrih authored Mar 13, 2018
  3abf0573
- [x86] add test for WriteZero sched class instructions; NFC · bb45cc12
  Sanjay Patel authored Mar 13, 2018
  bb45cc12
- [DAGCombine] visitREM - Don't assume that one divrem isn't driving another · 9855b393
  Simon Pilgrim authored Mar 13, 2018
  9855b393
- [X86][Btver2] Split i8/i16/i32/i64 div/idiv costs · 3d4c86d3
  Simon Pilgrim authored Mar 13, 2018
  3d4c86d3
- [mips] Fix the definitions of the EVA instructions · 476ed8f2
  Simon Dardis authored Mar 13, 2018
  476ed8f2
- [mips] Don't create nested CALLSEQ_START..CALLSEQ_END nodes. · 9d7e9032
  Simon Dardis authored Mar 13, 2018
  9d7e9032
- [X86][SSE41] createVariablePermute v2X64 - PCMPEQQ can test for index 0/1 and select between them. · 93bd7187
  Simon Pilgrim authored Mar 13, 2018
  93bd7187
- [CodeGenPrepare] Respect endianness in splitMergedValStore. · 5612bb29
  Jonas Paulsson authored Mar 13, 2018
  5612bb29
- bpf: Extends zero extension elimination beyond comparison instructions · c88bcdec
  Yonghong Song authored Mar 13, 2018
  c88bcdec
- bpf: J*_RR should check both operands · 905d13c1
  Yonghong Song authored Mar 13, 2018
  905d13c1
- bpf: Tighten subregister definition check · 89e47ac6
  Yonghong Song authored Mar 13, 2018
  89e47ac6
- bpf: Add more check directives in peephole testcase · fddb9f4e
  Yonghong Song authored Mar 13, 2018
  fddb9f4e
- [LegalizeTypes] In SplitVecOp_TruncateHelper, use GetSplitVector on the input... · 80058e30
  Craig Topper authored Mar 13, 2018
  80058e30
Mar 12, 2018
- [AArch64] Fold adds with tprel_lo12_nc and secrel_lo12 into a following ldr/str · 7bc64bd8
  Martin Storsjö authored Mar 12, 2018
  7bc64bd8
- [Hexagon] Fix typo in testcase · 36ca823f
  Krzysztof Parzyszek authored Mar 12, 2018
  36ca823f
- [Hexagon] Counting leading/trailing bits is cheap · 2d08f2eb
  Krzysztof Parzyszek authored Mar 12, 2018
  2d08f2eb
- [Hexagon] Subtarget feature to emit one instruction per packet · 5d41cc19
  Krzysztof Parzyszek authored Mar 12, 2018
  5d41cc19
- [AMDGPU] Fix lowering enqueue kernel when kernel has no name · a99e7d8e
  Yaxun Liu authored Mar 12, 2018
  a99e7d8e
- [Hexagon] Add REQUIRES: asserts to testcases that use -stats · ea2324f8
  Krzysztof Parzyszek authored Mar 12, 2018
  ea2324f8
- [Hexagon] Add REQUIRES: asserts to testcases that use -debug-only · 5b39f7cf
  Krzysztof Parzyszek authored Mar 12, 2018
  5b39f7cf
- [AMDGPU][MC] Corrected GATHER4 opcodes · da4a7c01
  Dmitry Preobrazhensky authored Mar 12, 2018
  da4a7c01
- [Hexagon] Add more lit tests · 046090db
  Krzysztof Parzyszek authored Mar 12, 2018
  046090db
- AMDGPU/GlobalISel: Legality and RegBankInfo for G_{INSERT|EXTRACT}_VECTOR_ELT · 7b9ed89d
  Matt Arsenault authored Mar 12, 2018
  7b9ed89d
- AMDGPU/GlobalISel: InstrMapping for G_MERGE_VALUES · c0aefd56
  Matt Arsenault authored Mar 12, 2018
  c0aefd56
- AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal · 503afda9
  Matt Arsenault authored Mar 12, 2018
  503afda9
- [X86][SSE] createVariablePermute - PSHUFB requires SSSE3 not just SSE3 · 6618e2a0
  Simon Pilgrim authored Mar 12, 2018
  6618e2a0
Mar 11, 2018
- [X86][MMX] Support MMX build vectors to avoid SSE usage (PR29222) · d09cc9c6
  Simon Pilgrim authored Mar 11, 2018
  d09cc9c6
- [X86][AVX512] Added more non-VLX test cases · 55ed3dc6
  Simon Pilgrim authored Mar 11, 2018
  55ed3dc6
- [X86][AVX] createVariablePermute - scale v16i16 variable permutes to use v32i8 codegen · 30f74c14
  Simon Pilgrim authored Mar 11, 2018
  30f74c14
- [X86][AVX] createVariablePermute - widen permutes for cases where the source... · b3065017
  Simon Pilgrim authored Mar 11, 2018
  b3065017
- [X86][AVX] createVariablePermute - use PSHUFB+PCMPGT+SELECT for v32i8 variable permutes · 9a5d0c75
  Simon Pilgrim authored Mar 11, 2018
  9a5d0c75
- [X86][AVX] createVariablePermute - use 2xVPERMIL+PCMPGT+SELECT for v8i32/v8f32... · f9cc80d2
  Simon Pilgrim authored Mar 11, 2018
  f9cc80d2