Commits · d5e89e8fc1aa5d0af0ba7e9ac209a9b1a191df0b · Roger Ferrer / llvm-epi · GitLab

Nov 12, 2020
- [KnownBits] Add KnownBits::makeConstant helper. NFCI. · 89967427
  Simon Pilgrim authored Nov 12, 2020
  89967427
- [SVE] Deal with SVE tuple call arguments correctly when running out of registers · 3225fcf1
  David Sherwood authored Oct 22, 2020
  3225fcf1
Nov 11, 2020
- [NFC] [Legalize] Fix spaces and style. · fdb979cf
  Pavel Iliin authored Nov 11, 2020
  
  fdb979cf
- Revert "Reland [CFGuard] Add address-taken IAT tables and delay-load support" · 418f18c6
  Hans Wennborg authored Nov 11, 2020
  418f18c6
- [KnownBits] Add KnownBits::commonBits helper. NFCI. · 1a62ca65
  Simon Pilgrim authored Nov 11, 2020
  1a62ca65
- [SVE][CodeGen] Lower scalable masked scatters · 170947a5
  Kerry McLaughlin authored Nov 11, 2020
  170947a5
- [SVE][CodeGen] Add the isTruncatingStore flag to MSCATTER · ffbbfc76
  Kerry McLaughlin authored Nov 11, 2020
  ffbbfc76
- [SelectionDAG] fminnum should be a binary operator · 09e34048
  Chen Zheng authored Nov 10, 2020
  09e34048
- [SafeStack] Make sure SafeStack does not break musttail call contract · b8a8ef32
  Xun Li authored Nov 10, 2020
  b8a8ef32
- [NFC] Use [MC]Register in TwoAddressInstructionPass · a0b71297
  Gaurav Jain authored Nov 04, 2020
  a0b71297
Nov 10, 2020
- [ARM] Alter t2DoLoopStart to define lr · b2ac9681
  David Green authored Nov 10, 2020
  b2ac9681
- [GlobalISel] Add combine for (x | mask) -> x when (x | mask) == x · a75d6178
  Mirko Brkusanin authored Nov 06, 2020
  a75d6178
- [GlobalISel] Expand combine for (x & mask) -> x when (x & mask) == x · fb36ab0a
  Mirko Brkusanin authored Nov 06, 2020
  fb36ab0a
- [AMDGPU][GlobalISel] Combine shift + logic + shift with constant operands · 53ae95c9
  Mirko Brkusanin authored Oct 30, 2020
  53ae95c9
- [AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands · de719586
  Mirko Brkusanin authored Oct 29, 2020
  de719586
Nov 09, 2020
- [SelectionDAG] Enable CTPOP optimization fine tuning · a41ea782
  David Zarzycki authored Oct 28, 2020
  a41ea782
- [FastISel] Reduce spills around mem-intrinsic calls · 920befb3
  Paul Robinson authored Nov 05, 2020
  920befb3
- [XCOFF] Enable explicit sections on AIX · 42d21093
  jasonliu authored Nov 09, 2020
  42d21093
- [SelectionDAG] NFC: Hoist is legal check · 57e46e71
  David Zarzycki authored Nov 09, 2020
  57e46e71
- [llvm][AArch64] Simplify (and (sign_extend..) #bitmask). · fc2fe681
  Francesco Petrogalli authored Nov 09, 2020
  fc2fe681
Nov 07, 2020
- AsmPrinter/Dwarf*: Use llvm::Register instead of unsigned · ee476968
  Fangrui Song authored Nov 06, 2020
  
  ee476968
- [AsmPrinter] Rename ByteStreamer::EmitInt8 to emitInt8 · 76844960
  Fangrui Song authored Nov 06, 2020
  76844960
Nov 06, 2020
- Prevent LICM and machineLICM from hoisting convergent operations · a5852280
  Quentin Colombet authored Nov 06, 2020
  a5852280
- [NFC] Fix typo in comment. · b3d0f028
  Than McIntosh authored Nov 05, 2020
  b3d0f028
Nov 05, 2020
- [MachineOutliner] Do not outline debug instructions · 5b30d9ad
  Momchil Velikov authored Nov 05, 2020
  5b30d9ad
- [LegalizeTypes] Remove unnecessary if around switch in ScalarizeVectorOperand... · 98d7e583
  Craig Topper authored Nov 05, 2020
  98d7e583
- [DAG] computeKnownBits - Replace ISD::SREM handling with KnownBits::srem to reduce code duplication · bf04e343
  Simon Pilgrim authored Nov 05, 2020
  
  bf04e343
- [GlobalISel] Don't use Register type for getNumOperands(). NFCI. · 7fe7c6d3
  Simon Pilgrim authored Nov 05, 2020
  7fe7c6d3
- [KnownBits] Move ValueTracking/SelectionDAG UREM KnownBits handling to KnownBits::urem. NFCI. · e237d56b
  Simon Pilgrim authored Nov 05, 2020
  e237d56b
- [KnownBits] Move ValueTracking/SelectionDAG UDIV KnownBits handling to KnownBits::udiv. NFCI. · 32bee18b
  Simon Pilgrim authored Nov 05, 2020
  32bee18b
- [GlobalISel] ComputeKnownBits - use common KnownBits shift handling (PR44526) · 546d002d
  Simon Pilgrim authored Nov 05, 2020
  546d002d
- [SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference. · d57bba7c
  Sander de Smalen authored Nov 04, 2020
  d57bba7c
- Revert rGbbeb08497ce58 "Revert "[GlobalISel]... · b2576579
  Simon Pilgrim authored Nov 05, 2020
  b2576579
- [MachineSink] add more profitable pattern. · f645cea8
  Chen Zheng authored Sep 21, 2020
  f645cea8
Nov 04, 2020
- [SelectionDAG] Add legalizations for VECREDUCE_SEQ_FMUL · c126eb75
  Cameron McInally authored Nov 04, 2020
  c126eb75
- [DAGCombine] Fix bug in load scalarization · f99580c1
  Fraser Cormack authored Apr 21, 2020
  f99580c1
- Revert "[GlobalISel] GISelKnownBits::computeKnownBitsImpl - Replace... · bbeb0849
  Fangrui Song authored Nov 04, 2020
  bbeb0849
- [GlobalISel] GISelKnownBits::computeKnownBitsImpl - Replace... · 0b8711e1
  Simon Pilgrim authored Nov 04, 2020
  0b8711e1
- Use isa<> instead of dyn_cast<> to avoid unused variable warning. NFCI. · 93c2a9ae
  Simon Pilgrim authored Nov 04, 2020
  
  93c2a9ae
- [SVE][CodeGen] Lower scalable integer vector reductions · f2412d37
  Kerry McLaughlin authored Nov 04, 2020
  f2412d37