Commits · d6de1e1a71406c75a4ea4d5a2fe84289f07ea3a1 · Roger Ferrer / llvm-epi · GitLab

Apr 17, 2021
- Normalize interaction with boolean attributes · d6de1e1a
  Serge Guelton authored Mar 24, 2021
  d6de1e1a
- [PowerPC] Minor improvement for insert_vector_elt codegen · ff769dd1
  Nemanja Ivanovic authored Apr 16, 2021
  ff769dd1
- [inferattrs] Don't infer lib func attributes for nobuiltin functions · 11707435
  Philip Reames authored Apr 16, 2021
  11707435
Apr 16, 2021
- [funcattrs] Add the maximal set of implied attributes to definitions · f549176a
  Philip Reames authored Apr 16, 2021
  f549176a
- Simplify BitVector code · 550ed575
  serge-sans-paille authored Apr 13, 2021
  550ed575
- [AMDGPU] Remove redundant field from DPP8 def · a0ed70ab
  Joe Nash authored Apr 16, 2021
  a0ed70ab
- [AMDGPU] NFC, Comment in disassembler for dpp8 · 919236e6
  Joe Nash authored Apr 16, 2021
  919236e6
- [AMDGPU] Enforce that gfx802/803/805 do not support XNACK · 13875aab
  Tony authored Dec 10, 2020
  13875aab
- [WebAssembly] Remove saturating fp-to-int target intrinsics · 5c729750
  Thomas Lively authored Apr 16, 2021
  5c729750
- [nofree] Restrict semantics to memory visible to caller · ff55d01a
  Philip Reames authored Apr 16, 2021
  ff55d01a
- [AMDGPU] Remove dead dcode (NFC). · 97618522
  Christudasan Devadasan authored Apr 16, 2021
  
  97618522
- [DAG] SelectionDAG::isSplatValue - early out if binop is not splat. NFCI. · 37a4621f
  Simon Pilgrim authored Apr 16, 2021
  37a4621f
- [AMDGPU] Refactor VOP3P Profile and AsmParser, NFC · 7cc4a02f
  Joe Nash authored Apr 15, 2021
  7cc4a02f
- Verify the LLVMContext that an Attribute belongs to. · 244d9d6e
  Nick Lewycky authored Mar 24, 2021
  244d9d6e
- [ARM] Prevent phi-node-elimination from generating copy above t2WhileLoopStartLR · 093f1828
  Malhar Jajoo authored Apr 16, 2021
  093f1828
- [OpenMP IRBuilder, MLIR] Add support for OpenMP do schedule dynamic · 517c3aee
  Mats Petersson authored Apr 16, 2021
  517c3aee
- [SystemZ][z/OS] Add IsText Argument to GetFile and GetFileOrSTDIN · e71994a2
  Jonathan Crowther authored Apr 16, 2021
  e71994a2
- [ValueTracking] don't recursively compute known bits using multiple llvm.assumes · bb907b26
  Sanjay Patel authored Apr 16, 2021
  bb907b26
- [X86][CostModel] Fix cost model for non-power-of-two vector load/stores · b06c55a6
  Roman Lebedev authored Apr 16, 2021
  b06c55a6
- [SystemZ][z/OS][Windows] Add new functions that set Text/Binary mode for Stdin... · 3be2ba0b
  Abhina Sreeskantharajan authored Apr 16, 2021
  3be2ba0b
- [ARM] Combine sub 0, csinc X, Y, CC -> csinv -X, Y, CC · 00a60454
  David Green authored Apr 16, 2021
  00a60454
- [Aarch64] handle "o" inline asm memory constraints · bb7016f8
  Nick Desaulniers authored Apr 15, 2021
  bb7016f8
- [RISCV] Don't emit save-restore call if function is a interrupt handler · 2893570e
  Jim Lin authored Apr 16, 2021
  2893570e
- [AMDGPU] Refactor ds_read/ds_write related select code for better readability. · 099dcb68
  hsmahesha authored Apr 16, 2021
  099dcb68
- [MLGO] Fix use of AM.invalidate post D100519 · 0d06b14f
  Mircea Trofin authored Apr 15, 2021
  0d06b14f
- [LICM][NFC] Fix typo · f8cf3b99
  Marcythm authored Apr 14, 2021
  f8cf3b99
- [NFC][NewPM] Remove some AnalysisManager invalidate methods · 9c776c2f
  Arthur Eubanks authored Apr 14, 2021
  9c776c2f
- [InferAttrs] Do not mark first argument of str(n)cat as writeonly. · 3e7ee542
  Florian Hahn authored Apr 15, 2021
  3e7ee542
Apr 15, 2021
- [clang][AArch64] Correctly align HFA arguments when passed on the stack · f9d932e6
  Momchil Velikov authored Apr 15, 2021
  f9d932e6
- [AMDGPU] Factor out predicate FmaakFmamkF32Insts · 13015ebd
  Stanislav Mekhanoshin authored Apr 13, 2021
  13015ebd
- [VPlan] Replace a few unnecessary includes with forward decls. · 49999d43
  Florian Hahn authored Apr 15, 2021
  
  49999d43
- [AMDGPU] Add new EmitDstSel field to VOPPofile. NFC. · d4385e48
  Stanislav Mekhanoshin authored Apr 15, 2021
  d4385e48
- [AMDGPU] Move LDS lowering related utility functions to a separate utils file. · 82787eb2
  hsmahesha authored Apr 16, 2021
  82787eb2
- [Hexagon] Avoid infinite loops in type legalization when lowering SETCC · 28067812
  Krzysztof Parzyszek authored Apr 15, 2021
  28067812
- [RISCV] Share RVInstIShift and RVInstIShiftW instruction format classes with the B extension. · 1656df13
  Craig Topper authored Apr 15, 2021
  1656df13
- [OpenMP] Added codegen for masked directive · e0c2125d
  cchen authored Apr 15, 2021
  e0c2125d
- [LoopUnrollAndJam] Avoid repeated instructions for UAJ analysis · 55487079
  Danilo C. Grael authored Apr 15, 2021
  55487079
- [NewPM] Cleanup IR printing instrumentation · c8f0a7c2
  Arthur Eubanks authored Apr 14, 2021
  c8f0a7c2
- [asan] Add an offset for the kernel address sanitizer on FreeBSD · f511dc75
  Mark Johnston authored Apr 15, 2021
  f511dc75
- [PowerPC] Add ROP Protection Instructions for PowerPC · f28cb01b
  Stefan Pintilie authored Apr 15, 2021
  f28cb01b