Commits · d8be0c510cb1e3c45eb07af90d602d544bb6b42b · Roger Ferrer / llvm-epi · GitLab

Dec 26, 2012
- Merge still more SSE/AVX instruction definitions. · 24f316e4
  Craig Topper authored Dec 26, 2012
  24f316e4
- Merge more SSE/AVX instruction definitions. · af629e27
  Craig Topper authored Dec 26, 2012
  af629e27
- Fix 80 column violation. · 65fe3045
  Craig Topper authored Dec 26, 2012
  65fe3045
- Fix class name in comment. · f4d0fe8f
  Craig Topper authored Dec 26, 2012
  f4d0fe8f
- Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions. · 59747c4d
  Craig Topper authored Dec 26, 2012
  59747c4d
- Remove 'v' from mnemonic to fix asm matching failures. · 8a486775
  Craig Topper authored Dec 26, 2012
  8a486775
- Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction... · b4ef0fa3
  Craig Topper authored Dec 26, 2012
  b4ef0fa3
- Reformat the docs. · 5267bb71
  Nadav Rotem authored Dec 26, 2012
  5267bb71
- Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction... · a2594dd5
  Craig Topper authored Dec 26, 2012
  a2594dd5
- Merge an AVX/SSE 256-bit and 128-bit multiclass. · 97730a0d
  Craig Topper authored Dec 26, 2012
  97730a0d
- Mark VANDNPD/VANDNPDS as not commutable. · 8b597463
  Craig Topper authored Dec 26, 2012
  8b597463
- Remove alignment from a bunch more VEX encoded operations in the folding tables. · 81d1e596
  Craig Topper authored Dec 26, 2012
  81d1e596
- Remove alignment from folding table for VMOVUPD as an unaligned instruction it... · b2922164
  Craig Topper authored Dec 26, 2012
  b2922164
- Remove alignment requirements from (V)EXTRACTPS. This instruction does 32-bit... · d09a9af9
  Craig Topper authored Dec 26, 2012
  d09a9af9
- Remove alignment requirement from VCVTSS2SD in folding tables. Reverting... · caef1c5d
  Craig Topper authored Dec 26, 2012
  caef1c5d
Dec 25, 2012
- Expand PPC64 atomic load and store · 1b5ff08d
  Hal Finkel authored Dec 25, 2012
  1b5ff08d
- X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use of and commutativity. · 81b5a8fd
  Benjamin Kramer authored Dec 25, 2012
  81b5a8fd
- X86: Custom lower <2 x i64> eq and ne when SSE41 is not available. · df4af41b
  Benjamin Kramer authored Dec 25, 2012
  df4af41b
- VCVTSS2SD requires a strict alignment. Thanks Elena. · 00410ae6
  Nadav Rotem authored Dec 25, 2012
  00410ae6
Dec 24, 2012
- Quiet gcc's -Wparenthesis warning. No functionality change. · 521e0d59
  Nick Lewycky authored Dec 24, 2012
  521e0d59
- Use a std::string rather than a dynamically allocated char* buffer. · 9d46110f
  Benjamin Kramer authored Dec 24, 2012
  9d46110f
- CostModel: We have API for checking the costs of known shuffles. This patch adds · 3ee6b10d
  Nadav Rotem authored Dec 24, 2012
  3ee6b10d
- Some x86 instructions can load/store one of the operands to memory. On SSE,... · dc0ad92b
  Nadav Rotem authored Dec 24, 2012
  dc0ad92b
- Change the codegen Cost Model API for shuffeles. This patch removes the API... · 7e1599e1
  Nadav Rotem authored Dec 24, 2012
  7e1599e1
Dec 23, 2012
- CostModel: Change the default target-independent implementation for finding · cf9999d9
  Nadav Rotem authored Dec 23, 2012
  cf9999d9
- whitespace · b15c69a7
  Nadav Rotem authored Dec 23, 2012
  b15c69a7
- Rename a function. · 1bef5a05
  Nadav Rotem authored Dec 23, 2012
  1bef5a05
- Loop Vectorizer: Update the cost model of scatter/gather operations and make · 2cade680
  Nadav Rotem authored Dec 23, 2012
  2cade680
Dec 22, 2012
- X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available. · 76268ac6
  Benjamin Kramer authored Dec 22, 2012
  76268ac6
- X86: Emit vector sext as shuffle + sra if vpmovsx is not available. · b2f0a2bd
  Benjamin Kramer authored Dec 22, 2012
  b2f0a2bd
- In some cases, due to scheduling constraints we copy the EFLAGS. · d5aae980
  Nadav Rotem authored Dec 21, 2012
  d5aae980
- [mips] Refactor subword-swap, EXT/INS, load-effective-address and read-hardware · 6ac2fc49
  Akira Hatanaka authored Dec 21, 2012
  6ac2fc49
- [mips] Refactor SYNC and multiply/divide instructions. · beea8a34
  Akira Hatanaka authored Dec 21, 2012
  beea8a34
- [mips] Refactor BAL instructions. · 31ddec58
  Akira Hatanaka authored Dec 21, 2012
  31ddec58
- [mips] Fix encoding of BAL instruction. Also, fix assembler test case which · d6b694f0
  Akira Hatanaka authored Dec 21, 2012
  d6b694f0
- [mips] Refactor jump, jump register, jump-and-link and nop instructions. · a158042a
  Akira Hatanaka authored Dec 21, 2012
  a158042a
- [mips] Refactor load/store left/right and load-link and store-conditional · e1826d74
  Akira Hatanaka authored Dec 21, 2012
  e1826d74
Dec 21, 2012
- [mips] Refactor load/store instructions. · d9bf8424
  Akira Hatanaka authored Dec 21, 2012
  d9bf8424
- [mips] Remove unnecessary isPseudo parameter. · b59b047f
  Akira Hatanaka authored Dec 21, 2012
  b59b047f
- [mips] Refactor LUI instruction. · e738efc9
  Akira Hatanaka authored Dec 21, 2012
  e738efc9