Commits · d8d24c64fe21948d0d4faf60e7a0ce6ba21b0b1a · Roger Ferrer / llvm-epi · GitLab

Sep 08, 2021
- [DAG] Fix GT -> GE condition when creating SetCC · d8d24c64
  David Green authored Sep 08, 2021
  d8d24c64
- [LiveDebugValues] Handle spills of indirect debug values correctly · 93b09a2a
  Evgeny Leviant authored Sep 08, 2021
  93b09a2a
- [MemCpyOpt] Fix a variety of scalable-type crashes · 7fb66d40
  Fraser Cormack authored Sep 06, 2021
  7fb66d40
- [LegalizeTypes][VP] Add promotion support for binary VP ops · 2c5568a6
  Fraser Cormack authored Aug 18, 2021
  2c5568a6
- [AArch64][SME] Fix imm bug in mov vector to tile aliases · 89786c2b
  Cullen Rhodes authored Sep 07, 2021
  89786c2b
- [AArch64] Implement extract_subvector for predicates. · 981f7d56
  Sander de Smalen authored Sep 07, 2021
  981f7d56
- [SimplifyCFG] Preserve knowledge about guarding condition by adding assume · 29d054bf
  Max Kazantsev authored Sep 08, 2021
  29d054bf
- [AVR] Add support for the tinyAVR 0-series and tinyAVR 1-series · b0d4d969
  Justin Latimer authored Sep 08, 2021
  b0d4d969
- [AArch64] Improve target hook function to decide folding (mul (add x, c1), c2) · f0460fa4
  Ben Shi authored Sep 04, 2021
  f0460fa4
- [X86][MS] Fix the aligement mismatch of vector variable arguments on Win32 · 9d7d34c7
  Wang, Pengfei authored Sep 08, 2021
  9d7d34c7
- [SCEV] Use no-self-wrap flags infered from exit structure to compute trip count · 6cdca906
  Philip Reames authored Sep 07, 2021
  6cdca906
- [WebAssembly] Error out on indirect uses of setjmp · a1d52293
  Heejin Ahn authored Sep 03, 2021
  a1d52293
- [NFC][C API] Make LLVMSetInstrParamAlignment's index param type LLVMAttributeIndex · 39e2e3bd
  Arthur Eubanks authored Sep 07, 2021
  39e2e3bd
Sep 07, 2021
- [Support] Implement getMainExecutable on Solaris · 08ba87fa
  Rainer Orth authored Sep 07, 2021
  08ba87fa
- [SCEV] Further clarify comments regarding UB and zero stride · 96590699
  Philip Reames authored Sep 07, 2021
  96590699
- [InstCombine] fold icmp equality with 'or' mask ops · a3c1669b
  Sanjay Patel authored Sep 07, 2021
  a3c1669b
- [AArch64][Global ISel] Add sext/zext of vector extract improvements · 7023cefe
  Irina Dobrescu authored Sep 07, 2021
  7023cefe
- Don't check if the result of hasAttrSomewhere is non-zero in CallBase::getReturnedArgOperand() · 4b053416
  Arthur Eubanks authored Sep 06, 2021
  4b053416
- [X86] Don't clobber EBX in stackprobes · ae8507b0
  Elliot Saba authored Sep 07, 2021
  ae8507b0
- [UseListOrder] Fix use list order for function operands · f5832eaa
  Nikita Popov authored Sep 04, 2021
  f5832eaa
- Add missing overloads for Function::addRetAttr(s) · 7f54009a
  Arthur Eubanks authored Sep 07, 2021
  
  7f54009a
- [ConstFold] Support opaque pointers in constexpr GEPs · 58db5f6e
  Nikita Popov authored Jul 20, 2021
  58db5f6e
- Copy Elementtype Attribute to IR at Link step · 34528c32
  Andy Kaylor authored Sep 03, 2021
  34528c32
- [NFC][InstCombine] Make check for sret in a vararg function clearer · b81fc14f
  Arthur Eubanks authored Sep 06, 2021
  b81fc14f
- Reland "[InstCombine] Recognize `((x * y) s/ x) !=/== y` as an signed... · 35fa7b8a
  Roman Lebedev authored Sep 07, 2021
  35fa7b8a
- [X86ISelLowering] avoid emitting libcalls to __mulodi4() · d0eeb64b
  Nick Desaulniers authored Sep 07, 2021
  d0eeb64b
- [X86] X86InstrAVX512.td - remove unused template parameters. NFC. · 9eda4721
  Simon Pilgrim authored Sep 07, 2021
  9eda4721
- [Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC) · 5648f717
  Kazu Hirata authored Sep 07, 2021
  
  5648f717
- [RISCV] Fix "set but not used" warnings · 5c6338de
  Kazu Hirata authored Sep 07, 2021
  
  5c6338de
- [InstCombine] ror/rol(X, RotAmt) == C --> X == rol/ror(C, RotAmt) (PR51567) · 3b5f318f
  Dávid Bolvanský authored Sep 07, 2021
  3b5f318f
- [IROutliner] Adding outlining for single entry/single exit multiblock regions · 81d3ac0c
  Andrew Litteken authored Jul 28, 2021
  81d3ac0c
- [PowerPC] Fixed the crash due to early if conversion with fixed CR fields · 4a226529
  Victor Huang authored Aug 30, 2021
  4a226529
- [X86] Add missing domain to avx512_ord_cmp_sae comis sae patterns · f8d2cd14
  Simon Pilgrim authored Sep 07, 2021
  f8d2cd14
- [PowerPC] Guard XSRSP in P8 for FastISel · 042a6564
  Jinsong Ji authored Sep 07, 2021
  042a6564
- [AArch64][SVE] Improve extract_subvector for predicates. · bd576e5a
  Sander de Smalen authored Sep 07, 2021
  bd576e5a
- [MC] Use local MCSubtargetInfo in writeNops · e63455d5
  Peter Smith authored Aug 09, 2021
  e63455d5
- [MC] Add MCSubtargetInfo to MCAlignFragment · 5e71839f
  Peter Smith authored Aug 06, 2021
  5e71839f
- [amdgpu] Enable selection of `s_cselect_b64`. · 640beb38
  Michael Liao authored Aug 30, 2021
  640beb38
- [AMDGPU][GlobalISel] Legalize G_MUL for non-standard types · 6c4b634d
  Mirko Brkusanin authored Sep 07, 2021
  6c4b634d
- [AMDGPU][GlobalISel] Legalization of G_ROTL and G_ROTR · 5263bf58
  Mirko Brkusanin authored Sep 07, 2021
  5263bf58