Commits · d9654723ad8508583dc8a3c649e04a15cb82d386 · Roger Ferrer / llvm-epi · GitLab

Jun 25, 2019
- [ARM] Extra MVE-related testing. · d9654723
  Simon Tatham authored Jun 25, 2019
  d9654723
- [ARM] Add remaining miscellaneous MVE instructions. · 86b7a1e6
  Simon Tatham authored Jun 25, 2019
  86b7a1e6
- [ARM] Add MVE vector load/store instructions. · e6824160
  Simon Tatham authored Jun 25, 2019
  e6824160
- [TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND · 49b3778e
  Simon Pilgrim authored Jun 25, 2019
  49b3778e
- [PowerPC] Emit XXSEL for vec_sel and code that has the same pattern · 47b7d134
  Nemanja Ivanovic authored Jun 25, 2019
  47b7d134
- [ARM] DLS/LE low-overhead loop code generation · a6fd919c
  Sam Parker authored Jun 25, 2019
  a6fd919c
- [Codegen] TargetLowering::SimplifySetCC(): omit urem when possible · cdd43eac
  Roman Lebedev authored Jun 25, 2019
  cdd43eac
- [yaml2obj/obj2yaml] - Allow having the symbols and sections with duplicated names. · 60dc5d4b
  George Rimar authored Jun 25, 2019
  60dc5d4b
- [X86] Add test case that led to the revert of r363802, r363850, and r363856 in r364264 · 33e547bd
  Craig Topper authored Jun 25, 2019
  33e547bd
- Revert r363802, r363850, and r363856 "[TargetLowering] SimplifyDemandedBits..." · 079924b0
  Craig Topper authored Jun 25, 2019
  079924b0
- AMDGPU/GlobalISel: Fix regbankselect for amdgcn.class · 25bc2796
  Matt Arsenault authored Jun 25, 2019
  25bc2796
- [InstCombine][NFC] Add test to show missing fold for icmp ult/uge (shl %x, C2), C1. · 2cc3b385
  Huihui Zhang authored Jun 25, 2019
  2cc3b385
- [InstCombine] Fold icmp eq/ne (and %x, C), 0 iff (-C) is power of two -> %x u</u>= (-C) earlier. · 4626613f
  Huihui Zhang authored Jun 25, 2019
  4626613f
- [NFC] Fix tests added in r364225 which failed on Windows due to incorrect path separators. · 1433b1b6
  Douglas Yung authored Jun 24, 2019
  1433b1b6
- [InstCombine] squash is-not-power-of-2 using ctpop · 2675b0c8
  Sanjay Patel authored Jun 24, 2019
  2675b0c8
- AMDGPU/GlobalISel: Add tests for regbankselect of v2s16 and/or/xor · 2100caf7
  Matt Arsenault authored Jun 24, 2019
  2100caf7
Jun 24, 2019
- InstCombine: Preserve nuw when reassociating nuw ops [3/3] · 80258425
  Matt Arsenault authored Jun 24, 2019
  80258425
- InstCombine: Preserve nuw when reassociating nuw ops [2/3] · 5d82ecd5
  Matt Arsenault authored Jun 24, 2019
  5d82ecd5
- InstCombine: Preserve nuw when reassociating nuw ops [1/3] · 5a89ba73
  Matt Arsenault authored Jun 24, 2019
  5a89ba73
- [NFC][Reassociate] Add unary FNeg tests to fast-ReassociateVector.ll · 1e5116cb
  Cameron McInally authored Jun 24, 2019
  1e5116cb
- [CVP] Reenable nowrap flag inference · f1ffc430
  Nikita Popov authored Jun 24, 2019
  f1ffc430
- [InstCombine] add tests for more variants of isPowerOf2; NFC · 2aa80005
  Sanjay Patel authored Jun 24, 2019
  2aa80005
- llvm-symbolizer: Add a FRAME command. · 9c8282a9
  Peter Collingbourne authored Jun 24, 2019
  9c8282a9
- [InstCombine] Regenerate test pr17827. NFCI. · 94b43160
  Huihui Zhang authored Jun 24, 2019
  94b43160
- [CodeGen] Add missing vector type legalization for ctlz_zero_undef · ea08248b
  Roland Froese authored Jun 24, 2019
  ea08248b
- [Tests] Add cases where we're failing to discharge provably loop exits (tests for D63733) · b2f09391
  Philip Reames authored Jun 24, 2019
  b2f09391
- [SLP] Support unary FNeg vectorization · fe3f15cf
  Cameron McInally authored Jun 24, 2019
  fe3f15cf
- AMDGPU/GlobalISel: Select G_TRUNC · dbb6c031
  Matt Arsenault authored Jun 24, 2019
  dbb6c031
- AMDGPU/GlobalISel: RegBankSelect for amdgcn.class · 14d0b646
  Matt Arsenault authored Jun 24, 2019
  14d0b646
- [PowerPC][UpdateTestChecks] powerpc- triple support · 318b6daf
  Jinsong Ji authored Jun 24, 2019
  318b6daf
- AMDGPU/GlobalISel: Split VALU s64 G_ZEXT/G_SEXT in RegBankSelect · 8fcd5ade
  Matt Arsenault authored Jun 24, 2019
  8fcd5ade
- [llvm-objdump] Match GNU objdump on symbol types shown in disassembly · 6e04b92c
  Yuanfang Chen authored Jun 24, 2019
  6e04b92c
- [AMDGPU] Allow any value in unused src0 field in v_nop · d2fdb956
  Tim Renouf authored Jun 24, 2019
  d2fdb956
- [X86] Cleanups and safety checks around the isFNEG · 033774e1
  Craig Topper authored Jun 24, 2019
  033774e1
- [AArch64] Regenerate vcvt tests. NFCI. · fd7d0d4e
  Simon Pilgrim authored Jun 24, 2019
  fd7d0d4e
- [AArch64] Regenerate 2velem tests. NFCI. · de1ce823
  Simon Pilgrim authored Jun 24, 2019
  de1ce823
- [AArch64] Regenerate merge-store tests. NFCI. · 0f0bbbd4
  Simon Pilgrim authored Jun 24, 2019
  0f0bbbd4
- [X86] Regenerate fast fadd reduction tests. NFCI · cf6917c6
  Simon Pilgrim authored Jun 24, 2019
  cf6917c6
- AMDGPU/GlobalISel: Fix selecting G_IMPLICIT_DEF for s1 · f8a841b8
  Matt Arsenault authored Jun 24, 2019
  f8a841b8
- [InstCombine] reduce funnel-shift i16 X, X, 8 to bswap X · 89efefb1
  Sanjay Patel authored Jun 24, 2019
  89efefb1