Commits · da1b2ea9557da12050ed8ff6449e2511e9bcf48e · Roger Ferrer / llvm-epi · GitLab

Jul 23, 2015
- AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer... · da1b2ea9
  Igor Breger authored Jul 23, 2015
  da1b2ea9
- AVX : Fix ISA disabling in case AVX512VL , some instructions should be... · 87e6397f
  Igor Breger authored Jul 23, 2015
  87e6397f
- Refactor duplicated code and check for invalid symbol table size. · 6565ea72
  Rafael Espindola authored Jul 23, 2015
  6565ea72
- [dsymutil] Check archive members timestamps. · 9ccfddc3
  Frederic Riss authored Jul 22, 2015
  9ccfddc3
- [ConstantFolding] Support folding loads from a GlobalAlias · ed9abe11
  David Majnemer authored Jul 22, 2015
  ed9abe11
- Force the gnu archive format to fix the test on darwin. · 41f0f108
  Rafael Espindola authored Jul 22, 2015
  41f0f108
Jul 22, 2015
- WebAssembly: basic bitcode → assembly CodeGen test · b9073fb2
  JF Bastien authored Jul 22, 2015
  b9073fb2
- MIR Serialization: Serialize the machine instruction's debug location. · 46d760d1
  Alex Lorenz authored Jul 22, 2015
  46d760d1
- Fix fetching the symbol table of a thin archive. · be9ab268
  Rafael Espindola authored Jul 22, 2015
  be9ab268
- Identify thin archives as archives. · 69ef2afa
  Rafael Espindola authored Jul 22, 2015
  69ef2afa
- MIR Serialization: Serialize the metadata machine operands. · 35e44469
  Alex Lorenz authored Jul 22, 2015
  35e44469
- [ARM] Make the frame lowering code ready for shrink-wrapping. · 48b77200
  Quentin Colombet authored Jul 22, 2015
  48b77200
- [X86][AVX512] add reduce/range/scalef/rndScale · a5b2e5e2
  Asaf Badouh authored Jul 22, 2015
  a5b2e5e2
- Fix test from r242886 to use the right triple. · 75216a8d
  Michael Kuperstein authored Jul 22, 2015
  75216a8d
- [X86] Add .intel_syntax noprefix directive to intel-syntax x86 asm output · 23d952b6
  Michael Kuperstein authored Jul 22, 2015
  23d952b6
- Fix mem2reg to correctly handle allocas only used in a single block · d7240363
  Michael Kuperstein authored Jul 22, 2015
  d7240363
- [asan] Improve moving of non-instrumented allocas · 8ec94ead
  Kuba Brecka authored Jul 22, 2015
  8ec94ead
- AVX-512: Added intrinsics for VCVT* instructions. · a26f10ce
  Elena Demikhovsky authored Jul 22, 2015
  a26f10ce
- [LoopUnswitch] Code refactoring to separate trivial loop unswitch and... · c0f3a158
  Chen Li authored Jul 22, 2015
  c0f3a158
- [BranchFolding] do not iterate the aliases of virtual registers · 20d73c6c
  Jingyue Wu authored Jul 22, 2015
  20d73c6c
- [SROA] Fix a nasty pile of bugs to do with big-endian, different alloca · ccffdaf7
  Chandler Carruth authored Jul 22, 2015
  ccffdaf7
- [dsymutil] Implement ODR uniquing for C++ code. · 1c65094d
  Frederic Riss authored Jul 21, 2015
  1c65094d
- MIR Serialization: Start serializing the CFI operands with .cfi_def_cfa_offset. · f4baeb51
  Alex Lorenz authored Jul 21, 2015
  f4baeb51
Jul 21, 2015
- [MDA] change BlockScanLimit into a command line option. · d058ea92
  Jingyue Wu authored Jul 21, 2015
  d058ea92
- [AsmPrinter] Check for valid constants in handleIndirectSymViaGOTPCRel · e8640518
  Bruno Cardoso Lopes authored Jul 21, 2015
  e8640518
- [Object][ELF] Handle files with no section header string table. · 402a4f10
  Michael J. Spencer authored Jul 21, 2015
  402a4f10
- [PPC64LE] More vector swap optimization TLC · 2be8054b
  Bill Schmidt authored Jul 21, 2015
  2be8054b
- Re-land 242726 to use RAII to do cleanup · 2f907557
  Reid Kleckner authored Jul 21, 2015
  2f907557
- MergeFunc: Transfer the callee's attributes when replacing a direct caller · 36512330
  Arnold Schwaighofer authored Jul 21, 2015
  36512330
- MIR Serialization: Serialize the external symbol machine operands. · 6ede3744
  Alex Lorenz authored Jul 21, 2015
  6ede3744
- Revert 242726, it broke ASan on OS X. · f00afcc7
  Nico Weber authored Jul 21, 2015
  f00afcc7
- Constfold trunc,rint,nearbyint,ceil and floor using APFloat · d818e38f
  Karthik Bhat authored Jul 21, 2015
  d818e38f
- AVX512 : Implemented VPMADDUBSW and VPMADDWD instruction , · f7fd547e
  Igor Breger authored Jul 21, 2015
  f7fd547e
- [ARM] Define subtarget feature "reserve-r9", which is used to decide · 28581525
  Akira Hatanaka authored Jul 21, 2015
  28581525
- ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common code · a50d2203
  Matthias Braun authored Jul 21, 2015
  a50d2203
- ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2 · e40d89ef
  Matthias Braun authored Jul 21, 2015
  e40d89ef
- Revert r242737. · 42427d2c
  Akira Hatanaka authored Jul 20, 2015
  42427d2c
- [ARM] Define subtarget feature "reserve-r9", which is used to decide · 7482d40c
  Akira Hatanaka authored Jul 20, 2015
  7482d40c
- Revert "ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2" · 731e359e
  Matthias Braun authored Jul 20, 2015
  731e359e
- Revert "ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common code" · 84e28970
  Matthias Braun authored Jul 20, 2015
  84e28970