Commits · da9e0bd3a238f80b05a3070c8a8a3cadadc12e5f · Roger Ferrer / llvm-epi · GitLab

Nov 07, 2017
- [NVPTX] Implement __nvvm_atom_add_gen_d builtin. · da9e0bd3
  Justin Lebar authored Nov 07, 2017
  da9e0bd3
- Use new vector insert half-word and byte instructions when we see... · 5cd044e8
  Graham Yiu authored Nov 07, 2017
  5cd044e8
- [Hexagon] Make a test more flexible in HexagonLoopIdiomRecognition · 385a4e04
  Krzysztof Parzyszek authored Nov 07, 2017
  385a4e04
- [AArch64][SVE] Asm: Add support for (ADD|SUB)_ZZZ · b9368108
  Florian Hahn authored Nov 07, 2017
  b9368108
- [AArch64][SVE] Asm: Add SVE (Z) Register definitions and parsing support · 91f11e5a
  Florian Hahn authored Nov 07, 2017
  91f11e5a
- [AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models. · d825bbdc
  Florian Hahn authored Nov 07, 2017
  d825bbdc
- Reland "Correct dwarf unwind information in function epilogue for X86" · e2a585dd
  Petar Jovanovic authored Nov 07, 2017
  e2a585dd
- [SLP] Fix PR35047: Fix default cost model for cast op in X86. · e25a6fd3
  Alexey Bataev authored Nov 07, 2017
  e25a6fd3
- [AArch64][SVE] Asm: Replace 'IsVector' by 'RegKind' in AArch64AsmParser (NFC) · c4422247
  Florian Hahn authored Nov 07, 2017
  c4422247
- [GlobalISel] Enable legalizing non-power-of-2 sized types. · af9814a1
  Kristof Beyls authored Nov 07, 2017
  af9814a1
- [X86] Don't clobber reserved registers with stack adjustments · c02b237e
  Bjorn Steinbrink authored Nov 07, 2017
  c02b237e
- [X86] Add patterns to fold a 64-bit load into the EVEX vcvtph2ps instructions. · e7fb3002
  Craig Topper authored Nov 07, 2017
  e7fb3002
- [X86] Add patterns for folding a v16i8 with the VEX vcvtph2ps intrinsics. · 0231b1d4
  Craig Topper authored Nov 07, 2017
  0231b1d4
- [X86] Add support for using EVEX instructions for the legacy vcvtph2ps intrinsics. · cf8e6d0a
  Craig Topper authored Nov 07, 2017
  cf8e6d0a
- [X86] Use IMPLICIT_DEF in VEX/EVEX vcvtss2sd/vcvtsd2ss patterns instead of a COPY_TO_REGCLASS. · afc3c820
  Craig Topper authored Nov 07, 2017
  afc3c820
- [X86] Remove 'Requires' from instructions with no patterns. NFC · 4ad81b51
  Craig Topper authored Nov 07, 2017
  4ad81b51
- AMDGPU: Remove redundant combine · 6119f800
  Matt Arsenault authored Nov 07, 2017
  6119f800
Nov 06, 2017
- [X86] Make FeatureAVX512 imply FeatureF16C. · 428a4e63
  Craig Topper authored Nov 06, 2017
  428a4e63
- [X86] Make FeatureAVX512 imply FeatureFMA. · cb6c3861
  Craig Topper authored Nov 06, 2017
  cb6c3861
- Fix buildbot breakages from r317503. Add parentheses to assignment when using... · 52a52a6c
  Graham Yiu authored Nov 06, 2017
  52a52a6c
- Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles,... · 030621bb
  Graham Yiu authored Nov 06, 2017
  030621bb
- [PPC] Use xxbrd to speed up bswap64 · e3b8d9a3
  Guozhi Wei authored Nov 06, 2017
  e3b8d9a3
- AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32 · 4f6318fe
  Matt Arsenault authored Nov 06, 2017
  4f6318fe
- [IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags and add 'trans' fast-math-flag · 629c4115
  Sanjay Patel authored Nov 06, 2017
  629c4115
- [X86][SSE] Merge combineExtractVectorElt_SSE into combineExtractVectorElt. NFCI. · ad9b9720
  Simon Pilgrim authored Nov 06, 2017
  ad9b9720
- [X86][SSE] Combine EXTRACT_VECTOR_ELT with combineExtractWithShuffle before... · 14450720
  Simon Pilgrim authored Nov 06, 2017
  14450720
- [AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environment · cc56a8b1
  Yaxun Liu authored Nov 06, 2017
  cc56a8b1
- [SystemZ] implement hasDivRemOp() · e54cc1a4
  Jonas Paulsson authored Nov 06, 2017
  e54cc1a4
- [AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bit · 1ac16619
  Yaxun Liu authored Nov 06, 2017
  1ac16619
- [mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version · 169df4e2
  Simon Dardis authored Nov 06, 2017
  169df4e2
- [LV][X86] update the cost of interleaving mem. access of floats · 66917583
  Mohammed Agabaria authored Nov 06, 2017
  66917583
- [mips] Fix PR35140 · e5779538
  Simon Dardis authored Nov 06, 2017
  e5779538
- [X86][AVX512] Improve lowering of AVX512 test intrinsics · bb86686a
  Uriel Korach authored Nov 06, 2017
  bb86686a
- [X86] Replace duplicate function call with variable. NFC · eb47d95d
  Uriel Korach authored Nov 06, 2017
  eb47d95d
- X86 ISel: Basic support for variable-index vector permutations · 31226980
  Zvi Rackover authored Nov 06, 2017
  31226980
- Revert "adding a pattern for broadcastm" · 3844f1ad
  Jina Nahias authored Nov 06, 2017
  3844f1ad
- [x86][AVX512] Lowering Broadcastm intrinsics to LLVM IR · 7b705f1f
  Jina Nahias authored Nov 06, 2017
  7b705f1f
- adding a pattern for broadcastm · 9c6561b6
  Jina Nahias authored Nov 06, 2017
  9c6561b6
- [X86] Use EVEX encoded intrinsics for legacy FMA intrinsics when possible. · 70eaeae7
  Craig Topper authored Nov 06, 2017
  70eaeae7
- [X86] Add scalar FMA ISD nodes without rounding mode. NFC · 07dac55d
  Craig Topper authored Nov 06, 2017
  07dac55d