Commits · dc81e69eb126ea1dbab202733ae34b1a3d6eb0cf · Roger Ferrer / llvm-epi · GitLab

May 31, 2023
- [IndVars] Check expansion safety in makeIVComparisonInvariant() (PR62992) · dc81e69e
  Nikita Popov authored May 31, 2023
  dc81e69e
- [MemoryBuiltins] Handle phi nodes without operands (PR63013) · 13791274
  Nikita Popov authored May 31, 2023
  13791274
- [RISCV] Add special case for (select cc, 1.0, 0.0) to lowerSELECT · 548fa1d3
  LiaoChunyu authored May 31, 2023
  548fa1d3
- Revert "Fix -u option in dsymutil, to not emit an extra DW_LNE_set_address if... · 1e26c6ab
  Shubham Sandeep Rastogi authored May 30, 2023
  1e26c6ab
- Fix -u option in dsymutil, to not emit an extra DW_LNE_set_address if the... · 9bd3ff8b
  Shubham Sandeep Rastogi authored May 26, 2023
  9bd3ff8b
- [RISCV] Fix selection for some unmasked vp SDNode. · 62307f6d
  Jianjian GUAN authored May 30, 2023
  62307f6d
- [RISCV] Add some tail undisturbed vwmacc tests. NFC · 510f4168
  Craig Topper authored May 30, 2023
  510f4168
- [RISCV] Allow FWMUL formation for an FP extend used twice by the same multiply. · 45416335
  Craig Topper authored May 30, 2023
  
  45416335
May 30, 2023
- [AMDGPU][IGLP] Parameterize the SchedGroup processing / linking order in Solver · 1721e72d
  Jeffrey Byrnes authored Apr 27, 2023
  1721e72d
- [AMDGPU][LoadStoreVectorizer] Pre-commit test for addrspace 7 crash · 087b67cc
  Krzysztof Drewniak authored May 30, 2023
  087b67cc
- [RISCV][GlobalISel] Add lowerFormalArguments for calling convention · af8e3861
  Nitin John Raj authored May 30, 2023
  af8e3861
- [ConstraintElim] Add additional tests for and implication handling. · 02bf5e36
  Florian Hahn authored May 30, 2023
  
  02bf5e36
- [RISCV] Add additional vslide1up test coverage · b07d08bb
  Philip Reames authored May 30, 2023
  b07d08bb
- [RISCV] Rename vslide1down tests (should have been part of 24172de1 ) · 0bb23c58
  Philip Reames authored May 30, 2023
  
  0bb23c58
- [RISCV] Add tests for vslide1down shuffle/insert idiom · 24172de1
  Philip Reames authored May 30, 2023
  
  24172de1
- [AArch64] Add i1 insert/extract cost tests. NFC · 5e98dbff
  David Green authored May 30, 2023
  5e98dbff
- [X86] Regenerate sqrt-fastmath-mir.ll · 0ec79f41
  Simon Pilgrim authored May 30, 2023
  
  0ec79f41
- [CodeGen] Refactor IR generation functions to use IRBuilder in ComplexDeinterleaving pass · 40a81d31
  Igor Kirillov authored Apr 19, 2023
  40a81d31
- [LV] Use Legal::isUniform to detect uniform pointers. · 8098f257
  Florian Hahn authored May 30, 2023
  8098f257
- [RISCV] Use v(f)slide1up for shuffle+insert idiom · 544a240f
  Philip Reames authored May 30, 2023
  544a240f
- [InstCombine] Remove adjustMinMax() fold (PR62088) · 8378f1f4
  Nikita Popov authored May 30, 2023
  8378f1f4
- Revert "[FuncSpec] Replace LoopInfo with BlockFrequencyInfo" · 96a14f38
  Nikita Popov authored May 30, 2023
  96a14f38
- [X86] X86FixupVectorConstantsPass - attempt to replace full width integer... · ab4b9248
  Simon Pilgrim authored May 29, 2023
  ab4b9248
- [CodeGen] Add pre-commit tests for D148558 · 48339d0f
  Igor Kirillov authored Apr 17, 2023
  48339d0f
- [X86] getTargetConstantBitsFromNode - support extracting fp data from ConstantDataSequential · 95661b9c
  Simon Pilgrim authored May 30, 2023
  95661b9c
- [InstCombine] Remove computeKnownBits() fold for returns · f1106ef6
  Nikita Popov authored May 22, 2023
  f1106ef6
- [RISCV] Generalise shouldExtendTypeInLibcall logic to apply to all <XLEN floats on soft ABIs · c4efcd69
  Alex Bradbury authored May 30, 2023
  c4efcd69
- [RISCV] Add more tests in zdinx-boundary-check.ll · 216e2820
  Shao-Ce SUN authored May 27, 2023
  216e2820
- [RISCV][NFC] Fix unmasked test for vp_cttz and vp_ctlz. · 94477343
  Jianjian GUAN authored May 30, 2023
  94477343
- [RISCV] Teach performCombineVMergeAndVOps to handle instructions FMA instructions. · 9239d3a3
  Craig Topper authored May 29, 2023
  9239d3a3
- [RISCV] Fix unmasked vp_abs select. · 071e9d7b
  Jianjian GUAN authored May 29, 2023
  071e9d7b
May 29, 2023
- [RISCV][test] Expand bfloat.ll tests to include i16 bitcasts and load/store · 9bb34ca6
  Alex Bradbury authored May 29, 2023
  9bb34ca6
- [ConstraintElim] Add extra tests for and operand implying other op. · 0332f2c5
  Florian Hahn authored May 29, 2023
  0332f2c5
- [LV] Remove dead CHECK lines after 280656ea . · fcc135a8
  Florian Hahn authored May 29, 2023
  fcc135a8
- [LSV] Return same bitwidth from getConstantOffset. · 420cf692
  Justin Lebar authored May 28, 2023
  420cf692
- [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector... · 98061013
  Simon Pilgrim authored May 27, 2023
  98061013
- Revert "[ValueTracking][InstCombine] Add a new API to allow to ignore poison... · cd2fc73b
  Florian Hahn authored May 29, 2023
  cd2fc73b
- [SelectionDAG] Implement soft FP legalisation for bf16 FP_EXTEND and BF16_TO_FP · 061e368f
  Alex Bradbury authored May 29, 2023
  061e368f
- [MemCpyOpt] remove byval from memcpy size crtical test(NFC) · 0ad88c15
  khei4 authored May 29, 2023
  0ad88c15
- [LICM] Reassociate & hoist sub expressions · dd0cf23e
  Max Kazantsev authored May 29, 2023
  dd0cf23e