Commits · dd471bbb10ce94863819946e449804eb68ebd260 · Roger Ferrer / llvm-epi · GitLab

Jun 21, 2010
- Add missing FileCheck call. · dd471bbb
  Dale Johannesen authored Jun 21, 2010
  dd471bbb
- test case for r106438. · c8bceaa4
  Devang Patel authored Jun 21, 2010
  c8bceaa4
- Fix PR 7433. Silly typo in non-Darwin ARM tail call · d5c58b76
  Dale Johannesen authored Jun 21, 2010
  d5c58b76
- Add some codegen patterns for x86_64-linux-gnu tls codegen matching. · bf572c7c
  Eric Christopher authored Jun 21, 2010
  bf572c7c
- Add the check to the testcase of r106419. · df071b7e
  Kalle Raiskila authored Jun 21, 2010
  df071b7e
- Mark the SPU 'lr' instruction to never have side effects. · 0ab5a025
  Kalle Raiskila authored Jun 21, 2010
  0ab5a025
- Fix the lowering of VECTOR_SHUFFLE on SPU to handle splats. · d7f50c11
  Kalle Raiskila authored Jun 21, 2010
  d7f50c11
- Fix lowering of VECTOR_SHUFFLE on SPU. Old algorithm · 6f58190f
  Kalle Raiskila authored Jun 21, 2010
  6f58190f
Jun 20, 2010
- Fix a crash caused by dereference of MBB.end(). rdar://8110842 · 884a8fe5
  Evan Cheng authored Jun 20, 2010
  884a8fe5
Jun 19, 2010
- Include the use kind along with the expression in the key of the · 51d00092
  Dan Gohman authored Jun 19, 2010
  51d00092
- Fix ScalarEvolution's "exhaustive" trip count evaluation code to avoid · 866971ed
  Dan Gohman authored Jun 19, 2010
  866971ed
- Refactor aliased packed logical instructions, also add · 8737b7d7
  Bruno Cardoso Lopes authored Jun 19, 2010
  8737b7d7
- Disable sibcall optimization for Thumb1 for now since... · f3c01f3e
  Evan Cheng authored Jun 19, 2010
  f3c01f3e
- Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions · 1e205f6b
  Bruno Cardoso Lopes authored Jun 19, 2010
  1e205f6b
- fix rdar://7873482 by teaching the instruction encoder to emit · e808a78a
  Chris Lattner authored Jun 19, 2010
  e808a78a
- Move ARM if-conversion before post-ra scheduling. · 119824ed
  Evan Cheng authored Jun 18, 2010
  119824ed
- Allow ARM if-converter to be run after post allocation scheduling. · 2d51c7c5
  Evan Cheng authored Jun 18, 2010
  2d51c7c5
- TwoAddressInstructionPass::CoalesceExtSubRegs can insert INSERT_SUBREG · 07f4fa81
  Jakob Stoklund Olesen authored Jun 18, 2010
  07f4fa81
- Fix an inverted condition. · cf9e8a98
  Evan Cheng authored Jun 18, 2010
  cf9e8a98
Jun 18, 2010
- When using ADDri to get the address of a stack object, 255 is a conservative · 22a212f9
  Jakob Stoklund Olesen authored Jun 18, 2010
  22a212f9
- Revert r106304 (105548 and friends), which are the SCEVComplexityCompare · 24ceda8e
  Dan Gohman authored Jun 18, 2010
  24ceda8e
- Teach tablegen how to inherit from classes in 'defm' definitions. · 23f8321c
  Bruno Cardoso Lopes authored Jun 18, 2010
  23f8321c
- Reapply 105540, 105542, and 105548, and revert r105732. · 4c807fca
  Dan Gohman authored Jun 18, 2010
  4c807fca
- Enable tail calls on ARM by default, with some · c1570dda
  Dale Johannesen authored Jun 18, 2010
  c1570dda
- Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86 · b9f91667
  Jakob Stoklund Olesen authored Jun 18, 2010
  b9f91667
- Don't write a file named "&1". · 559020df
  Dan Gohman authored Jun 18, 2010
  559020df
- Disable indvars on loops when LoopSimplify form is not available. · f3aea7ae
  Dan Gohman authored Jun 18, 2010
  f3aea7ae
- Don't maintain a set of deleted nodes; instead, use a HandleSDNode · 99ba4dac
  Dan Gohman authored Jun 18, 2010
  99ba4dac
- Add {mix,max}{ss,sd}{rr,rm} AVX forms. · 23231687
  Bruno Cardoso Lopes authored Jun 18, 2010
  23231687
- Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass, · b92156d5
  Dan Gohman authored Jun 18, 2010
  b92156d5
- Make this test less fragile. · 30d7a51d
  Dan Gohman authored Jun 18, 2010
  30d7a51d
Jun 17, 2010
- Testcase for llvm-gcc 106225. · 1f8e5fbc
  Dale Johannesen authored Jun 17, 2010
  1f8e5fbc
- Remove arm_apcscc from the test files. It is the default and doing this · 29dda21e
  Rafael Espindola authored Jun 17, 2010
  29dda21e
- For a tablegen expression such as !if(a,b,c), let 'a' · 4d1d7987
  Bruno Cardoso Lopes authored Jun 17, 2010
  4d1d7987
- let the '!eq' expression support 'int' and 'bit' types · 77a4a562
  Bruno Cardoso Lopes authored Jun 16, 2010
  77a4a562
Jun 16, 2010
- Allow a register to be redefined multiple times in a basic block. · 207cd4bb
  Jakob Stoklund Olesen authored Jun 16, 2010
  207cd4bb
- modify so the test doesn't drop an output file in the test source directory. · 2c8b8292
  Jim Grosbach authored Jun 16, 2010
  2c8b8292
- Be specific. Use FileCheck. · 79b0da30
  Devang Patel authored Jun 16, 2010
  79b0da30
- Make sure that simplify libcalls does not replace a call with one calling · a20e2dfe
  Rafael Espindola authored Jun 16, 2010
  a20e2dfe
- This requires more investigation. Unblock buildbots for now. · e3721dd2
  Devang Patel authored Jun 16, 2010
  e3721dd2