Commits · ddac5dd269f7223857941afe9d29a3cccab9f083 · Roger Ferrer / llvm-epi · GitLab

Apr 18, 2011
- Trim a few unneeded includes. · ddac5dd2
  Jim Grosbach authored Apr 18, 2011
  ddac5dd2
- Small fix to the ARM AsmParser to ensure that a · 5d73033e
  Sean Callanan authored Apr 18, 2011
  5d73033e
Apr 16, 2011
- Correct result when a branch condition is live across a block · ebddfe60
  Stuart Hastings authored Apr 16, 2011
  ebddfe60
- Thumb2 BFC was insufficiently encoded. · 48592ee5
  Johnny Chen authored Apr 15, 2011
  48592ee5
- A8.6.315 VLD3 (single 3-element structure to all lanes) · 761e1e35
  Johnny Chen authored Apr 15, 2011
  761e1e35
Apr 15, 2011
- Add ORR and EOR to the CMP peephole optimizer. It's hard to get isel to generate · 9c65e4d6
  Cameron Zwarich authored Apr 15, 2011
  9c65e4d6
- The AND instruction leaves the V flag unmodified, so it falls victim to the same · 0829b306
  Cameron Zwarich authored Apr 15, 2011
  0829b306
- Add missing register forms of instructions to the ARM CMP-folding code. This · 93eae157
  Cameron Zwarich authored Apr 15, 2011
  93eae157
- Fix a ton of comment typos found by codespell. Patch by · 0ab5e2cd
  Chris Lattner authored Apr 15, 2011
  0ab5e2cd
- Fix another fcopysign lowering bug. If src is f64 and destination is f32, don't · 12bb05b7
  Evan Cheng authored Apr 15, 2011
  12bb05b7
- For t2BFI, both Inst{26} and Inst{5} "should" be 0. · 681fef59
  Johnny Chen authored Apr 15, 2011
  681fef59
- The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions · 42131617
  Johnny Chen authored Apr 15, 2011
  42131617
- Follow up on r127913. Fix Thumb revsh isel. rdar://9286766 · 44887f9c
  Evan Cheng authored Apr 14, 2011
  44887f9c
Apr 14, 2011
- Add sanity checkings for Thumb2 Load/Store Register Exclusive family of operations. · 4251b151
  Johnny Chen authored Apr 14, 2011
  4251b151
Apr 13, 2011
- Thumb disassembler did not handle tBRIND (indirect branch) properly. · d0fb04f4
  Johnny Chen authored Apr 13, 2011
  d0fb04f4
- Check for unallocated instruction encodings when disassembling Thumb Branch... · b6a37bff
  Johnny Chen authored Apr 13, 2011
  b6a37bff
- The LDR*T/STR*T (unpriviledged load/store) operations don't take SP or PC as Rt. · ffa6378f
  Johnny Chen authored Apr 13, 2011
  ffa6378f
- Fix a typo in an ARM-specific DAG combine. This fixes <rdar://problem/9278274 >. · 415b5e83
  Cameron Zwarich authored Apr 13, 2011
  415b5e83
- Check the corner cases for t2LDRSHi12 correctly and mark invalid encodings as such. · 70591cbc
  Johnny Chen authored Apr 13, 2011
  70591cbc
- Fix a bug where for t2MOVCCi disassembly, the TIED_TO register operand was not properly handled. · 0d306a78
  Johnny Chen authored Apr 13, 2011
  0d306a78
- Forgot to add this change for http://llvm.org/viewvc/llvm-project?view=rev&revision=129387 . · b2f9fa1f
  Johnny Chen authored Apr 13, 2011
  b2f9fa1f
- Fix a typo. · 8001850e
  Cameron Zwarich authored Apr 13, 2011
  8001850e
- Add sanity check for Ld/St Dual forms of Thumb2 instructions. · 3c2f74c9
  Johnny Chen authored Apr 12, 2011
  3c2f74c9
- Add @earlyclobber constraints to the writeback register of all ARM store instructions. · 98716404
  Jakob Stoklund Olesen authored Apr 12, 2011
  98716404
Apr 12, 2011
- The Thumb2 RFE instructions need to have their second halfword fully specified. · 960eef3d
  Johnny Chen authored Apr 12, 2011
  960eef3d
- Add bad register checks for Thumb2 Ld/St instructions. · 01637b9a
  Johnny Chen authored Apr 12, 2011
  01637b9a
- The Thumb2 Ld, St, and Preload instructions with the i12 forms should have its Inst{23} · ab86a519
  Johnny Chen authored Apr 12, 2011
  ab86a519
- Print out a debug message when the reglist fails the sanity check for Thumb Ld/St Multiple. · d0e2be39
  Johnny Chen authored Apr 12, 2011
  d0e2be39
- Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and ARM · fbcd69b9
  Cameron Zwarich authored Apr 12, 2011
  fbcd69b9
- A8.6.16 B · 672ef14a
  Johnny Chen authored Apr 12, 2011
  672ef14a
- Thumb disassembler was erroneously rejecting "blx sp" instruction. · dc8bf9ec
  Johnny Chen authored Apr 11, 2011
  dc8bf9ec
Apr 11, 2011
- Fix the bug where the immediate shift amount for Thumb logical shift... · f79d5365
  Johnny Chen authored Apr 11, 2011
  f79d5365
- Fix another using-CPSR-twice bug in my ADCS/SBCS cleanups, and make proper use... · 5140802c
  Owen Anderson authored Apr 11, 2011
  5140802c
- Trivial comment fix. · 74adbdda
  Johnny Chen authored Apr 11, 2011
  74adbdda
- Check invalid register encodings for LdFrm/StFrm ARM instructions and flag them as · 66fab759
  Johnny Chen authored Apr 11, 2011
  66fab759
- Adding support for printing operands symbolically to llvm's public 'C' · 9377a52c
  Kevin Enderby authored Apr 11, 2011
  9377a52c
- Don't include Operator.h from InstrTypes.h. · 7c14a558
  Jay Foad authored Apr 11, 2011
  7c14a558
Apr 08, 2011
- Fix an apparent typo that made GCC complain · 4e1796e8
  Matt Beaumont-Gay authored Apr 08, 2011
  4e1796e8
- Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is... · 74d92c19
  Evan Cheng authored Apr 08, 2011
  74d92c19
- Check opcoe (dmb, dsb) instead of bitfields matching. · f2faf4e5
  Johnny Chen authored Apr 08, 2011
  f2faf4e5