Commits · ddd926441e7ff9b4b4217fbeea14ef79481021d2 · Roger Ferrer / llvm-epi · GitLab

Jan 03, 2015
- llvm-readobj: add support to dump COFF export tables · ddd92644
  Saleem Abdulrasool authored Jan 03, 2015
  ddd92644
- ARM: permit tail calls to weak externals on COFF · 67f72993
  Saleem Abdulrasool authored Jan 03, 2015
  67f72993
- [PowerPC/BlockPlacement] Allow target to provide a per-loop alignment preference · 5772566e
  Hal Finkel authored Jan 03, 2015
  5772566e
- [PowerPC] Use 16-byte alignment for modern cores for functions/loops · d73bfba7
  Hal Finkel authored Jan 03, 2015
  d73bfba7
- [PowerPC] Add support for the CMPB instruction · 4edc66b8
  Hal Finkel authored Jan 03, 2015
  4edc66b8
- [asan] simplify the tracing code, make it use the same guard variables as coverage · d421db05
  Kostya Serebryany authored Jan 03, 2015
  d421db05
- [X86] Disassembler support for move to/from %rax with a 32-bit memory offset... · ae8e1b38
  Craig Topper authored Jan 03, 2015
  ae8e1b38
Jan 02, 2015
- InstCombine: Detect when llvm.umul.with.overflow always overflows · c8a576b5
  David Majnemer authored Jan 02, 2015
  c8a576b5
- [X86] Make the instructions that use AdSize16/32/64 co-exist together without... · 055845f5
  Craig Topper authored Jan 02, 2015
  055845f5
- [SROA] Teach SROA to be more aggressive in splitting now that we have · 24ac830d
  Chandler Carruth authored Jan 02, 2015
  24ac830d
- [SROA] Add a test case for r225068 / PR22080. · e65ae893
  Chandler Carruth authored Jan 02, 2015
  e65ae893
Jan 01, 2015
- [SROA] Teach SROA how to much more intelligently handle split loads and · 0715cba0
  Chandler Carruth authored Jan 01, 2015
  0715cba0
- [PowerPC] Improve instruction selection bit-permuting operations (64-bit) · c58ce413
  Hal Finkel authored Jan 01, 2015
  c58ce413
Dec 31, 2014
- InstCombine: fsub nsz 0, X ==> fsub nsz -0.0, X · e68f7157
  Sanjay Patel authored Dec 31, 2014
  e68f7157
- Add r224985 back with a fix. · 54b435ec
  Rafael Espindola authored Dec 31, 2014
  54b435ec
- Reverting 225045 and 225043 and XFAIL multiline.ll on hexagon · 5691eb5e
  Colin LeMahieu authored Dec 31, 2014
  5691eb5e
- Add a test for the recent compiler-rt build failure. · 35e42db3
  Rafael Espindola authored Dec 31, 2014
  35e42db3
- Revert "Remove doesSectionRequireSymbols." · d4da9040
  Rafael Espindola authored Dec 31, 2014
  d4da9040
- [X86] Update disassembler tests for absolute move instructions to check the... · a7a8c4c0
  Craig Topper authored Dec 31, 2014
  a7a8c4c0
- InstCombine: try to transform A-B < 0 into A < B · f89dc3ed
  David Majnemer authored Dec 31, 2014
  f89dc3ed
- Revert "merge consecutive stores of extracted vector elements" · 553185ee
  Alexey Samsonov authored Dec 31, 2014
  553185ee
- [Hexagon] Adding accumulating add/sub, doubleword logic-not variants,... · bc405294
  Colin LeMahieu authored Dec 31, 2014
  bc405294
- Fix a test case to not depend on asm comment syntax, so as to be portable · 3927b971
  David Blaikie authored Dec 30, 2014
  3927b971
- Generalize even further, for ARM comment syntax (@) · 7a3f4829
  David Blaikie authored Dec 30, 2014
  7a3f4829
- [Hexagon] Adding double-logic on predicate instructions. · 8971e055
  Colin LeMahieu authored Dec 30, 2014
  8971e055
- Generalize test case to handle different asm syntax (# or // comments) · 56605aff
  David Blaikie authored Dec 30, 2014
  56605aff
- [Hexagon] Adding newvalue compare and jumps. · 65f3e12e
  Colin LeMahieu authored Dec 30, 2014
  65f3e12e
Dec 30, 2014
- DebugInfo: Omit is_stmt from line table entries on the same line. · aeaa5bf5
  David Blaikie authored Dec 30, 2014
  aeaa5bf5
- [Hexagon] Adding postincrement register newvalue stores. · 0cba5f1b
  Colin LeMahieu authored Dec 30, 2014
  0cba5f1b
- [Hexagon] Removing old newvalue store variants. Adding postincrement immediate newvalue stores. · 90148908
  Colin LeMahieu authored Dec 30, 2014
  90148908
- [mips][microMIPS] Relocate with symbol for micromips symbols · 10646918
  Zoran Jovanovic authored Dec 30, 2014
  10646918
- [Hexagon] Adding indexed store new-value variants. · 820d5cb6
  Colin LeMahieu authored Dec 30, 2014
  820d5cb6
- [Hexagon] Adding indexed store of immediates. · 2bad4a71
  Colin LeMahieu authored Dec 30, 2014
  2bad4a71
- [Hexagon] Adding indexed stores. · 94a498bf
  Colin LeMahieu authored Dec 30, 2014
  94a498bf
- x86_64: Fix calls to __morestack under the large code model. · 7ef497b1
  Peter Collingbourne authored Dec 30, 2014
  7ef497b1
- [asan] change _sanitizer_cov_module_init to accept int* instead of int** · aa185bfc
  Kostya Serebryany authored Dec 30, 2014
  aa185bfc
- [COFF] Don't try to add quotes to already quoted linker directives · c43b0633
  Michael Kuperstein authored Dec 30, 2014
  c43b0633
- [Hexagon] Adding reg-reg indexed load forms. · 9161d474
  Colin LeMahieu authored Dec 30, 2014
  9161d474
- [Hexagon] Adding compare byte/halfword reg-reg/reg-imm forms. Adding compare... · 377ac653
  Colin LeMahieu authored Dec 30, 2014
  377ac653
- [Hexagon] Updating constant extender def, adding alu-not instructions, compare... · d7a56fd9
  Colin LeMahieu authored Dec 30, 2014
  d7a56fd9