Commits · de5fbe9c60d88308e5eabfe0360ba66863c09768 · Roger Ferrer / llvm-epi · GitLab

Jan 11, 2016
- AMDGPU: Pattern match ffbh pattern to instruction. · de5fbe9c
  Matt Arsenault authored Jan 11, 2016
  de5fbe9c
- AMDGPU: Custom lower i64 ctlz · f058d676
  Matt Arsenault authored Jan 11, 2016
  f058d676
- LegalizeDAG: Expand ctlz with ctlz_zero_undef if legal · 5ca3c72c
  Matt Arsenault authored Jan 11, 2016
  5ca3c72c
- [mips] Never select JAL for calls to an absolute immediate address. · 4d32300c
  Daniel Sanders authored Jan 11, 2016
  4d32300c
- [BranchFolding] Set correct mem refs (2nd try) · 7ceec0b8
  Junmo Park authored Jan 11, 2016
  7ceec0b8
- [AVX-512] Make spacing between comma and {sae} operand consistent in asm strings. · bfe13ff6
  Craig Topper authored Jan 11, 2016
  bfe13ff6
Jan 10, 2016
- Optimized instruction sequence for sitofp operation on X86-32 · 542dfcf4
  Elena Demikhovsky authored Jan 10, 2016
  542dfcf4
- [AVX512] add PRORVQ and PRORVD Intrinsic · 885f61c5
  Michael Zuckerman authored Jan 10, 2016
  885f61c5
- [WinEH] Disallow cyclic unwinds · 8ea80863
  Joseph Tremoulet authored Jan 10, 2016
  8ea80863
- [WinEH] Verify consistent funclet unwind exits · 81e81960
  Joseph Tremoulet authored Jan 10, 2016
  81e81960
- Revert "[BranchFolding] Set correct mem refs" · 0fc89c67
  Michael Zolotukhin authored Jan 09, 2016
  0fc89c67
Jan 09, 2016
- [X86][AVX] Match broadcast loads through a bitcast · c7bebcbf
  Simon Pilgrim authored Jan 09, 2016
  c7bebcbf
- [X86][AVX] Add support for i64 broadcast loads on 32-bit targets · 2e7a1849
  Simon Pilgrim authored Jan 09, 2016
  2e7a1849
- [BranchFolding] Set correct mem refs · e1582cec
  Junmo Park authored Jan 09, 2016
  e1582cec
Jan 08, 2016
- [DAGCombiner] don't dereference an operand that doesn't exist (PR26070) · 1dc7dfb9
  Sanjay Patel authored Jan 08, 2016
  1dc7dfb9
- RBIT Instruction only available for ARMv6t2 and above. · 4b3b13d3
  Weiming Zhao authored Jan 08, 2016
  4b3b13d3
- Do not ASSERTZEXT for i16 result of bitcast from f16 operand · bf5ccdcc
  Pirama Arumuga Nainar authored Jan 08, 2016
  bf5ccdcc
- [WinEH] CatchHandler which don't have catch objects in StackColoring · 2a6368f6
  David Majnemer authored Jan 08, 2016
  2a6368f6
- AMDGPU/SI: Emit global variable sizes when targeting HSA · 4c4c72db
  Tom Stellard authored Jan 08, 2016
  4c4c72db
- AMDGPU: Emit functions sizes · ad8f5e81
  Tom Stellard authored Jan 08, 2016
  ad8f5e81
- [WinEH] Update WinEHFuncInfo if StackColoring merges allocas · 086fec23
  David Majnemer authored Jan 08, 2016
  086fec23
- [X86] Don't print the aliased version of CVTSD2SI64rm. This appears to be a... · 04493fda
  Craig Topper authored Jan 08, 2016
  04493fda
- Add call sequence start and end for __tls_get_addr · bfcff385
  Kyle Butt authored Jan 08, 2016
  bfcff385
- Add some testing for thumb1 and thumb2 inline asm immediate constraints · b7932307
  Eric Christopher authored Jan 08, 2016
  b7932307
- WebAssembly: use .skip instead of .zero directive · b9ec4c6c
  JF Bastien authored Jan 07, 2016
  b9ec4c6c
Jan 07, 2016
- Temporarily revert r257105 "[Verifier] Check that debug values have proper size" · ea33a258
  Keno Fischer authored Jan 07, 2016
  ea33a258
- [Verifier] Check that debug values have proper size · b3326be6
  Keno Fischer authored Jan 07, 2016
  b3326be6
- [WebAssembly] Support combining GEP and FrameIndex offsets in memory operand offset field · 9bfea27c
  Derek Schuff authored Jan 07, 2016
  9bfea27c
- [WebAssembly] Use the default private label prefixes. · a4730cf0
  Dan Gohman authored Jan 07, 2016
  a4730cf0
- AMDGPU/SI: Fold operands with sub-registers · 82fc962c
  Nicolai Haehnle authored Jan 07, 2016
  82fc962c
- AMDGPU/SI: xnack_mask is always reserved on VI · 3c05d6d3
  Nicolai Haehnle authored Jan 07, 2016
  3c05d6d3
- [avx512] Fix test avx512bw-intrinsics.ll · 5b1cad87
  Michael Zuckerman authored Jan 07, 2016
  5b1cad87
- [AVX512] add PSLLW and PSLLV Intrinsic · 3aca221b
  Michael Zuckerman authored Jan 07, 2016
  3aca221b
- Revert r257055, it caused PR26064. · 4324b9b2
  Nico Weber authored Jan 07, 2016
  4324b9b2
- [AVX512] add PSRAV Intrinsic · 354152d5
  Michael Zuckerman authored Jan 07, 2016
  354152d5
- [AVX512] add PSHUFHW and PSHUFLW Intrinsic · a6df006b
  Michael Zuckerman authored Jan 07, 2016
  a6df006b
- [X86][AVX] Match broadcast loads through a bitcast · bcc11a05
  Simon Pilgrim authored Jan 07, 2016
  bcc11a05
- [X86][SSE} Add INSERTPS as a target shuffle · 83e44c66
  Simon Pilgrim authored Jan 07, 2016
  83e44c66
- [AVX512] add PSHUFD Intrinsic · 4a156682
  Michael Zuckerman authored Jan 07, 2016
  4a156682
- ARM: support TLS accesses on Darwin platforms · bd41cf88
  Tim Northover authored Jan 07, 2016
  bd41cf88