Commits · defe11866a326491ee9767f84bb3f70cfc4f4bcb · Roger Ferrer / llvm-epi · GitLab

Nov 05, 2020
- [RISCV] Add isel patterns for fnmadd/fnmsub with an fneg on the second operand... · defe1186
  Craig Topper authored Nov 05, 2020
  defe1186
- [RISCV] Add test cases to show missed opportunities to use fnmadd/fnmsub if... · 4a4f4f78
  Craig Topper authored Nov 05, 2020
  4a4f4f78
- [openacc][openmp] Allow duplicate between required and allowed once/exclusive · a8a10acb
  Valentin Clement authored Nov 05, 2020
  a8a10acb
- [TableGen] Clean up documentation toctrees; clarify two paragraphs. · 6f288b11
  Paul C. Anagnostopoulos authored Nov 04, 2020
  6f288b11
- [VE] Add isReMaterializable and isAsCheapAsAMove flags · f0e585d5
  Kazushi (Jam) Marukawa authored Nov 03, 2020
  f0e585d5
- Fix bugs in EOL marking in command line tokenizers · f5524745
  Reid Kleckner authored Nov 05, 2020
  f5524745
- [ARM] remove cost-kind predicate for cmp/sel costs · 264a6df3
  Sanjay Patel authored Nov 05, 2020
  264a6df3
- [MachineOutliner] Do not outline debug instructions · 5b30d9ad
  Momchil Velikov authored Nov 05, 2020
  5b30d9ad
- [AArch64][GlobalISel] Add AArch64::G_DUPLANE[X] opcodes for lane duplicates. · f347d78c
  Amara Emerson authored Nov 04, 2020
  f347d78c
- [gn build] (manually) port 82f86ae0 more · 439b5beb
  Nico Weber authored Nov 05, 2020
  
  439b5beb
- [gn build] (manually) port 82f86ae0 · b69af884
  Nico Weber authored Nov 05, 2020
  
  b69af884
- [LegalizeTypes] Remove unnecessary if around switch in ScalarizeVectorOperand... · 98d7e583
  Craig Topper authored Nov 05, 2020
  98d7e583
- Add default value for MachineInstr::modifiesRegister. NFC. · 35d62512
  Momchil Velikov authored Nov 05, 2020
  35d62512
- [RISCV] Use the 'si' lib call for (double (fp_to_sint/uint i32 X)) when F extension is enabled. · ce5f4f22
  Craig Topper authored Nov 05, 2020
  ce5f4f22
- [AMDGPU] Add default 1 glc operand to rtn atomics · f738aee0
  Stanislav Mekhanoshin authored Nov 03, 2020
  f738aee0
- [RISCV] Remove shadow register list passed to AllocateReg when allocating FP... · ce1270fc
  Craig Topper authored Nov 05, 2020
  ce1270fc
- [RISCV] Add isel patterns for fshl with immediate to select FSRI/FSRIW · c623584b
  Craig Topper authored Nov 05, 2020
  c623584b
- Revert "[CaptureTracking] Avoid overly restrictive dominates check" · afe92642
  Anna Thomas authored Nov 05, 2020
  afe92642
- [DAG] computeKnownBits - Replace ISD::SREM handling with KnownBits::srem to reduce code duplication · bf04e343
  Simon Pilgrim authored Nov 05, 2020
  
  bf04e343
- [GlobalISel] Don't use Register type for getNumOperands(). NFCI. · 7fe7c6d3
  Simon Pilgrim authored Nov 05, 2020
  7fe7c6d3
- [IndVarSimplify][SimplifyIndVar] Move WidenIV to Utils/SimplifyIndVar. NFCI. · 7eb70158
  Sjoerd Meijer authored Nov 05, 2020
  7eb70158
- [CaptureTracking] Avoid overly restrictive dominates check · 15694fd6
  Anna Thomas authored Nov 03, 2020
  15694fd6
- [gn build] Port 659f4bd8 · 1ec726f9
  LLVM GN Syncbot authored Nov 05, 2020
  
  1ec726f9
- [FileCheck] Use %ProtectFileCheckOutput in allow-unused-prefixes.txt · 98e8a06e
  Mircea Trofin authored Nov 02, 2020
  98e8a06e
- [KnownBits] Move ValueTracking SREM KnownBits handling to KnownBits::srem. NFCI. · 6729b6de
  Simon Pilgrim authored Nov 05, 2020
  6729b6de
- [KnownBits] Move ValueTracking/SelectionDAG UREM KnownBits handling to KnownBits::urem. NFCI. · e237d56b
  Simon Pilgrim authored Nov 05, 2020
  e237d56b
- [TableGen] Add true and false literals to represent booleans · ae2cb4f4
  Paul C. Anagnostopoulos authored Nov 02, 2020
  ae2cb4f4
- [KnownBits] Move ValueTracking/SelectionDAG UDIV KnownBits handling to KnownBits::udiv. NFCI. · 32bee18b
  Simon Pilgrim authored Nov 05, 2020
  32bee18b
- [GVN] Fix MemorySSA update when replacing assume(false) with stores. · be0578f0
  Florian Hahn authored Nov 05, 2020
  be0578f0
- [GlobalISel] ComputeKnownBits - use common KnownBits shift handling (PR44526) · 546d002d
  Simon Pilgrim authored Nov 05, 2020
  546d002d
- [SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference. · d57bba7c
  Sander de Smalen authored Nov 04, 2020
  d57bba7c
- Revert rGbbeb08497ce58 "Revert "[GlobalISel]... · b2576579
  Simon Pilgrim authored Nov 05, 2020
  b2576579
- [UnitTests] Add exhaustive tests for KnownBits shl/lshr/ashr · 6c1a3185
  Simon Pilgrim authored Nov 04, 2020
  6c1a3185
- [InstCombine] Remove orphan InstCombinerImpl method declarations. NFCI. · 4b2be681
  Simon Pilgrim authored Nov 04, 2020
  
  4b2be681
- [ARM] Make tests less dependent on scheduling. NFC · f38d1a95
  David Green authored Nov 05, 2020
  
  f38d1a95
- [NewPM] Provide method to run all pipeline callbacks, used for -O0 · ae385400
  Arthur Eubanks authored Oct 30, 2020
  ae385400
- Revert "[SCEV] Handle non-positive case in isImpliedViaOperations" · ab7ef35d
  Max Kazantsev authored Nov 05, 2020
  ab7ef35d
- [MachineSink] add more profitable pattern. · f645cea8
  Chen Zheng authored Sep 21, 2020
  f645cea8
- [SCEV] Handle non-positive case in isImpliedViaOperations · 8dc98897
  Max Kazantsev authored Nov 05, 2020
  8dc98897
- Recommit "[RISCV] Move some test cases from rv64i-single-softfloat.ll to a new... · 574de837
  Craig Topper authored Nov 04, 2020
  574de837