Commits · e07a9b38a6892136fceae0ee17fea0530b6f7623 · Roger Ferrer / llvm-epi · GitLab

Apr 06, 2021
- [InstCombine] Add PR45984 test case · e07a9b38
  Simon Pilgrim authored Apr 06, 2021
  e07a9b38
- [AMDGPU] Fix typo in regular expression checks. NFC. · 6fec0a34
  Jay Foad authored Apr 06, 2021
  
  6fec0a34
- [LoopVectorize] Change the identity element for FAdd · 857b8a73
  Kerry McLaughlin authored Apr 06, 2021
  857b8a73
- [AMDGPU][MC][GFX9] Corrected SMEM decoding · 3eadcb86
  Dmitry Preobrazhensky authored Apr 06, 2021
  3eadcb86
- [CostModel][X86] Improve accuracy of vXi8 multiply reduction costs · 201877d5
  Simon Pilgrim authored Apr 06, 2021
  201877d5
- [AMDGPU] Regenerate checks to fix prefixes broken in D96340. NFC. · 6eb5b06e
  Jay Foad authored Apr 06, 2021
  
  6eb5b06e
- [test, AArch64] Fix use of var defined in CHECK-NOT · 638d70be
  Thomas Preud'homme authored Mar 28, 2021
  638d70be
- [PhaseOrdering] Add PR45687 test coverage · 2fc761aa
  Simon Pilgrim authored Apr 06, 2021
  2fc761aa
- [IR] Ignore bitcasts of function pointers which are only used as callees in callbase instruction · 167ea67d
  madhur13490 authored Mar 18, 2021
  167ea67d
- [AArch64] Default to zero-cycle-zeroing FP registers · d5f1131c
  Sjoerd Meijer authored Apr 06, 2021
  d5f1131c
- [NFC][WebAssembly] Removed mangled name from test. · f1313b3b
  Sam Parker authored Apr 06, 2021
  
  f1313b3b
- [AArch64] Use 64-bit movi for zeroing halfs/floats · ef05b08c
  Sjoerd Meijer authored Apr 01, 2021
  ef05b08c
- [AMDGPU] Add some missing testing for new subtargets gfx90a and gfx90c · 94d0fc32
  Jay Foad authored Mar 31, 2021
  94d0fc32
- [NewPM] Redesign of PreserveCFG Checker · 39e3e3aa
  Yevgeny Rouban authored Apr 06, 2021
  39e3e3aa
- [NewPM] Change tests to run them without PreserveCFGChecker. NFC · 872c57c9
  Yevgeny Rouban authored Apr 06, 2021
  872c57c9
- [RISCV] When custom iseling masked stores, copy the mask into V0 instead of virtual register. · cb1028a0
  Craig Topper authored Apr 05, 2021
  cb1028a0
- [SROA] Allow SROA on pointers with invariant group intrinsic uses · ea0e2ca1
  Arthur Eubanks authored Mar 29, 2021
  ea0e2ca1
- Exact ashr/lshr don't loose any set bits and are thus trivially invertible · 13deb6aa
  Philip Reames authored Apr 05, 2021
  13deb6aa
- Copy syncscope when expanding atomicrmw into cmpxchg loop · 30b3aab3
  Stanislav Mekhanoshin authored Apr 05, 2021
  30b3aab3
- [RISCV] Add more RV32 vslide1up intrinsic test cases. NFC · 39151443
  Craig Topper authored Apr 05, 2021
  39151443
Apr 05, 2021
- [InstSimplify] fix potential miscompile in select value equivalence · e2a0f512
  Sanjay Patel authored Apr 05, 2021
  e2a0f512
- [InstSimplify] add test for vector select with operand replacement; NFC · 78e5cf66
  Sanjay Patel authored Apr 05, 2021
  78e5cf66
- Fix copy paste errors in tests from be11bd1e · 1d4c7429
  Philip Reames authored Apr 05, 2021
  1d4c7429
- [tests] Precommmit tests for reasoning about equality of recurrences · be11bd1e
  Philip Reames authored Apr 05, 2021
  
  be11bd1e
- [M68k] Add support for Motorola literal syntax to AsmParser · 4db18d62
  Ricky Taylor authored Jan 26, 2021
  4db18d62
- [LoopFusion] Bails out if only the second candidate is guarded (PR48060) · 6a82ace5
  Ta-Wei Tu authored Apr 06, 2021
  6a82ace5
- [RISCV] Add support for bitcasts between scalars and fixed-length vectors · af3a839c
  Fraser Cormack authored Mar 31, 2021
  af3a839c
- [InstCombine] fix potential miscompile in select value equivalence · c590a988
  Sanjay Patel authored Apr 05, 2021
  c590a988
- [InstCombine] add test for miscompile from select value equivalence; NFC · c0b0da46
  Sanjay Patel authored Apr 05, 2021
  c0b0da46
- [RISCV] Expand scalable-vector truncstores and extloads · 3f0df4d7
  Fraser Cormack authored Mar 31, 2021
  3f0df4d7
- [SLP]Improve vectorization of the CmpInst instructions. · 00a84f9a
  Alexey Bataev authored Apr 01, 2021
  00a84f9a
- [RISCV] Add a test showing incorrect codegen · 0d0514dd
  Fraser Cormack authored Jan 20, 2021
  0d0514dd
- [X86] Fold xor(zext(xor(x,c1)),c2) -> xor(zext(x),xor(zext(c1),c2)) · 36d4f6d7
  Simon Pilgrim authored Apr 05, 2021
  36d4f6d7
- [X86] Add second PR47603 test case · 2523fe8a
  Simon Pilgrim authored Apr 05, 2021
  2523fe8a
- [Test] Auto-update checks in a test · 67133ee1
  Max Kazantsev authored Apr 05, 2021
  
  67133ee1
- [Test] Split out new and old PM tests · 1a218589
  Max Kazantsev authored Apr 05, 2021
  1a218589
- [Test] Add tests for various scenarios of PRE of a loop load · a91628cb
  Max Kazantsev authored Apr 05, 2021
  
  a91628cb
- [RISCV] Use gorciw for i32 orc.b intrinsic when Zbp is enabled. · 4708a05d
  Craig Topper authored Apr 04, 2021
  4708a05d
Apr 04, 2021
- [InstCombine] dropRedundantMaskingOfLeftShiftInput(): check that adding shift... · 2760a808
  Roman Lebedev authored Apr 04, 2021
  2760a808
- [NFC][InstCombine] Add test for PR49778 · 5352490c
  Roman Lebedev authored Apr 04, 2021
  
  5352490c