Commits · e248dca3003f66e06bb739f77ff65033da29e02a · Roger Ferrer / llvm-epi · GitLab

Mar 23, 2010
- Rename some instructions to match the corresponding NEON opcode. · 9b680e21
  Bob Wilson authored Mar 23, 2010
  9b680e21
- Change VST1 instructions for loading Q register values to operate on pairs · cc0a2a75
  Bob Wilson authored Mar 23, 2010
  cc0a2a75
- Change VLD1 instructions for loading Q register values to operate on pairs · 340861d2
  Bob Wilson authored Mar 23, 2010
  340861d2
- MC: Add TargetAsmBackend::MayNeedRelaxation, for checking whether a particular... · 86face83
  Daniel Dunbar authored Mar 23, 2010
  86face83
- MC: Add TargetAsmBackend::WriteNopData and use to eliminate some target... · a9ae3ae6
  Daniel Dunbar authored Mar 23, 2010
  a9ae3ae6
- MC: Add TargetAsmBackend::RelaxInstruction callback, and custom X86 implementation. · e0c43577
  Daniel Dunbar authored Mar 23, 2010
  e0c43577
Mar 22, 2010
- Rename one more NEON instruction that I missed earlier. · e60e3ab6
  Bob Wilson authored Mar 22, 2010
  e60e3ab6
- Regroup some instructions. No functional change. · c286c88d
  Bob Wilson authored Mar 22, 2010
  c286c88d
- Rename some VLD1/VST1 instructions to match the implementation, i.e., the · c53a1125
  Bob Wilson authored Mar 22, 2010
  c53a1125
- Remove some redundant instruction classes. · 98bf5189
  Bob Wilson authored Mar 22, 2010
  98bf5189
- Refactor instruction encoding arguments for VLDnLN/VSTnLN classes to · debe0bdb
  Bob Wilson authored Mar 22, 2010
  debe0bdb
- Completely remove Blackfin patterns that thought JustCC was i1. · 5db55060
  Jakob Stoklund Olesen authored Mar 22, 2010
  5db55060
- Don't leak a MachineInstruction from Thumb1InstrInfo::restoreCalleeSavedRegisters. · 7d116ce2
  Jeffrey Yasskin authored Mar 22, 2010
  7d116ce2
Mar 20, 2010
- MC/X86: Fix an MCOperand link, when we parsing shrld $1,%eax and friends; I... · fbd12cc3
  Daniel Dunbar authored Mar 20, 2010
  fbd12cc3
- TargetRegistry: Fix create{AsmInfo,MCDisassembler} to return non-const objects. · fed917e0
  Daniel Dunbar authored Mar 20, 2010
  fed917e0
- pr6652: Use LDM to restore PC to the return address on ARMv4. · 162242b6
  Bob Wilson authored Mar 20, 2010
  162242b6
- Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6") · ae08a736
  Bob Wilson authored Mar 20, 2010
  ae08a736
- Add instruction variants for VST2, VST3, and VST4 "store-lane" operations with · 59e5141d
  Bob Wilson authored Mar 20, 2010
  59e5141d
- Add variants of VST2, VST3 and VST4 with address register writeback, and · b18adef4
  Bob Wilson authored Mar 20, 2010
  b18adef4
- Add instructions for double-spaced VST3 and VST4 without address register · 89ba42c4
  Bob Wilson authored Mar 20, 2010
  89ba42c4
- Add VST1 instructions with address register writeback. · 322cbff3
  Bob Wilson authored Mar 20, 2010
  322cbff3
- Add instruction variants for VLD2, VLD3, and VLD4 "load-lane" operations with · 9152d96d
  Bob Wilson authored Mar 20, 2010
  9152d96d
- Tidy some more comments and whitespace. · 9b158424
  Bob Wilson authored Mar 20, 2010
  9b158424
- Add variants of VLD2, VLD3 and VLD4 with address register writeback, and · cf324658
  Bob Wilson authored Mar 20, 2010
  cf324658
- Tidy some comments and whitespace for consistency. · 7ee900da
  Bob Wilson authored Mar 20, 2010
  7ee900da
- Rename some instructions for consistency and sanity: use "_UPD" suffix for · c0795f8b
  Bob Wilson authored Mar 20, 2010
  c0795f8b
- Add instructions for double-spaced VLD3 and VLD4 without address register · d092669b
  Bob Wilson authored Mar 20, 2010
  d092669b
- Add VLD1 instructions with address register writeback. · 496766cb
  Bob Wilson authored Mar 20, 2010
  496766cb
- PIC16: Simplify code by using a std::set<std::string> instead of a sorted &... · 73fc06f6
  Benjamin Kramer authored Mar 20, 2010
  73fc06f6
- Revert the rest of 98679. · 2497d85c
  Bob Wilson authored Mar 20, 2010
  2497d85c
- Fix a very bad typo. Since the register number was off by one, the ARM · 614d1fdf
  Bob Wilson authored Mar 20, 2010
  614d1fdf
- If call result is in ST0 and it is not being passed to the caller's · 3f6f769c
  Evan Cheng authored Mar 20, 2010
  3f6f769c
- Add NLdStFrm Format. · f833fad8
  Johnny Chen authored Mar 20, 2010
  f833fad8
- Revert r98679. The disassembler will be updated to depend on the existence of · 053e3510
  Johnny Chen authored Mar 19, 2010
  053e3510
Mar 19, 2010
- Revert this change, since it was causing ARM performance regressions. · e4191e71
  Bob Wilson authored Mar 19, 2010
  e4191e71
- remove the patterns that I commented out in r98930, Dan verified · 8352941b
  Chris Lattner authored Mar 19, 2010
  8352941b
- Fixed the encoding problems of the crc32 instructions. All had the Operand size · cf0843ed
  Kevin Enderby authored Mar 19, 2010
  cf0843ed
- MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen... · c5326973
  Daniel Dunbar authored Mar 19, 2010
  c5326973
- Renumber LdStExFrm from 28 to 11 and shift the existing format values to make · 0dab68f3
  Johnny Chen authored Mar 19, 2010
  0dab68f3
- MC: Add TargetAsmBackend::createObjectWriter. · 4d7c8645
  Daniel Dunbar authored Mar 19, 2010
  4d7c8645